src/flash/arm_nandio.c

   1 /*
   2  * Copyright (C) 2009 by Marvell Semiconductors, Inc.
   3  * Written by Nicolas Pitre <nico at marvell.com>
   4  *
   5  * Copyright (C) 2009 by David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the
  19  * Free Software Foundation, Inc.,
  20  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  21  */
  22
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "arm_nandio.h"
  28 #include "armv4_5.h"
  29 #include "algorithm.h"
  30
  31 /**
  32  * Copies code to a working area.  This will allocate room for the code plus the
  33  * additional amount requested if the working area pointer is null.
  34  *
  35  * @param target Pointer to the target to copy code to
  36  * @param code Pointer to the code area to be copied
  37  * @param code_size Size of the code being copied
  38  * @param additional Size of the additional area to be allocated in addition to
  39  *                   code
  40  * @param area Pointer to a pointer to a working area to copy code to
  41  * @return Success or failure of the operation
  42  */
  43 int arm_code_to_working_area(struct target *target, const uint32_t *code, unsigned code_size,
  44                 unsigned additional, struct working_area **area)
  45 {
  46         uint8_t code_buf[code_size];
  47         unsigned i;
  48         int retval;
  49         unsigned size = code_size + additional;
  50
  51         /* make sure we have a working area */
  52         if (NULL == *area) {
  53                 retval = target_alloc_working_area(target, size, area);
  54                 if (retval != ERROR_OK) {
  55                         LOG_DEBUG("%s: no %d byte buffer", __FUNCTION__, (int) size);
  56                         return ERROR_NAND_NO_BUFFER;
  57                 }
  58         }
  59
  60         /* buffer code in target endianness */
  61         for (i = 0; i < code_size / 4; i++)
  62                 target_buffer_set_u32(target, code_buf + i * 4, code[i]);
  63
  64         /* copy code to work area */
  65         retval = target_write_memory(target, (*area)->address,
  66                         4, code_size / 4, code_buf);
  67
  68         return retval;
  69 }
  70
  71 /*
  72  * ARM-specific bulk write from buffer to address of 8-bit wide NAND.
  73  * For now this only supports ARMv4 and ARMv5 cores.
  74  *
  75  * Enhancements to target_run_algorithm() could enable:
  76  *   - ARMv6 and ARMv7 cores in ARM mode
  77  *
  78  * Different code fragments could handle:
  79  *   - Thumb2 cores like Cortex-M (needs different byteswapping)
  80  *   - 16-bit wide data (needs different setup too)
  81  */
  82 int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
  83 {
  84         struct target           *target = nand->target;
  85         struct armv4_5_algorithm        algo;
  86         struct arm              *armv4_5 = target->arch_info;
  87         struct reg_param        reg_params[3];
  88         uint32_t                target_buf;
  89         uint32_t                exit = 0;
  90         int                     retval;
  91
  92         /* Inputs:
  93          *  r0  NAND data address (byte wide)
  94          *  r1  buffer address
  95          *  r2  buffer length
  96          */
  97         static const uint32_t code[] = {
  98                 0xe4d13001,     /* s: ldrb  r3, [r1], #1 */
  99                 0xe5c03000,     /*    strb  r3, [r0]     */
 100                 0xe2522001,     /*    subs  r2, r2, #1   */
 101                 0x1afffffb,     /*    bne   s            */
 102
 103                 /* exit: ARMv4 needs hardware breakpoint */
 104                 0xe1200070,     /* e: bkpt  #0           */
 105         };
 106
 107         if (!nand->copy_area) {
 108                 retval = arm_code_to_working_area(target, code, sizeof(code),
 109                                 nand->chunk_size, &nand->copy_area);
 110                 if (retval != ERROR_OK) {
 111                         return retval;
 112                 }
 113         }
 114
 115         /* copy data to work area */
 116         target_buf = nand->copy_area->address + sizeof(code);
 117         retval = target_bulk_write_memory(target, target_buf, size / 4, data);
 118         if (retval == ERROR_OK && (size & 3) != 0)
 119                 retval = target_write_memory(target,
 120                                 target_buf + (size & ~3),
 121                                 1, size & 3, data + (size & ~3));
 122         if (retval != ERROR_OK)
 123                 return retval;
 124
 125         /* set up algorithm and parameters */
 126         algo.common_magic = ARMV4_5_COMMON_MAGIC;
 127         algo.core_mode = ARMV4_5_MODE_SVC;
 128         algo.core_state = ARMV4_5_STATE_ARM;
 129
 130         init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
 131         init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
 132         init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
 133
 134         buf_set_u32(reg_params[0].value, 0, 32, nand->data);
 135         buf_set_u32(reg_params[1].value, 0, 32, target_buf);
 136         buf_set_u32(reg_params[2].value, 0, 32, size);
 137
 138         /* armv4 must exit using a hardware breakpoint */
 139         if (armv4_5->is_armv4)
 140                 exit = nand->copy_area->address + sizeof(code) - 4;
 141
 142         /* use alg to write data from work area to NAND chip */
 143         retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 144                         nand->copy_area->address, exit, 1000, &algo);
 145         if (retval != ERROR_OK)
 146                 LOG_ERROR("error executing hosted NAND write");
 147
 148         destroy_reg_param(&reg_params[0]);
 149         destroy_reg_param(&reg_params[1]);
 150         destroy_reg_param(&reg_params[2]);
 151
 152         return retval;
 153 }
 154
 155 /**
 156  * Uses an on-chip algorithm for an ARM device to read from a NAND device and
 157  * store the data into the host machine's memory.
 158  *
 159  * @param nand Pointer to the arm_nand_data struct that defines the I/O
 160  * @param data Pointer to the data buffer to store the read data
 161  * @param size Amount of data to be stored to the buffer.
 162  */
 163 int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
 164 {
 165         struct target *target = nand->target;
 166         struct armv4_5_algorithm algo;
 167         struct arm *armv4_5 = target->arch_info;
 168         struct reg_param reg_params[3];
 169         uint32_t target_buf;
 170         uint32_t exit = 0;
 171         int retval;
 172
 173         /* Inputs:
 174          *  r0  buffer address
 175          *  r1  NAND data address (byte wide)
 176          *  r2  buffer length
 177          */
 178         static const uint32_t code[] = {
 179                 0xe5d13000,     /* s: ldrb  r3, [r1]     */
 180                 0xe4c03001,     /*    strb  r3, [r0], #1 */
 181                 0xe2522001,     /*    subs  r2, r2, #1   */
 182                 0x1afffffb,     /*    bne   s            */
 183
 184                 /* exit: ARMv4 needs hardware breakpoint */
 185                 0xe1200070,     /* e: bkpt  #0           */
 186         };
 187
 188         /* create the copy area if not yet available */
 189         if (!nand->copy_area) {
 190                 retval = arm_code_to_working_area(target, code, sizeof(code),
 191                                 nand->chunk_size, &nand->copy_area);
 192                 if (retval != ERROR_OK) {
 193                         return retval;
 194                 }
 195         }
 196
 197         target_buf = nand->copy_area->address + sizeof(code);
 198
 199         /* set up algorithm and parameters */
 200         algo.common_magic = ARMV4_5_COMMON_MAGIC;
 201         algo.core_mode = ARMV4_5_MODE_SVC;
 202         algo.core_state = ARMV4_5_STATE_ARM;
 203
 204         init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
 205         init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
 206         init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
 207
 208         buf_set_u32(reg_params[0].value, 0, 32, target_buf);
 209         buf_set_u32(reg_params[1].value, 0, 32, nand->data);
 210         buf_set_u32(reg_params[2].value, 0, 32, size);
 211
 212         /* armv4 must exit using a hardware breakpoint */
 213         if (armv4_5->is_armv4)
 214                 exit = nand->copy_area->address + sizeof(code) - 4;
 215
 216         /* use alg to write data from NAND chip to work area */
 217         retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 218                         nand->copy_area->address, exit, 1000, &algo);
 219         if (retval != ERROR_OK)
 220                 LOG_ERROR("error executing hosted NAND write");
 221
 222         destroy_reg_param(&reg_params[0]);
 223         destroy_reg_param(&reg_params[1]);
 224         destroy_reg_param(&reg_params[2]);
 225
 226         /* read from work area to the host's memory */
 227         retval = target_read_buffer(target, target_buf, size, data);
 228
 229         return retval;
 230 }
 231