wip
[openocd.git] / src / target / target / str912.cfg
index e827cdf037fffb52cd61bbfa5a64d2d4a287118e..6f605b06f6f4887e8a00778c2c6cdeb53ee39231 100644 (file)
@@ -1,3 +1,10 @@
+# script for str9
+
+# jtag speed. We need to stick to 16kHz until we've finished reset.
+
+jtag_rclk 16
+
+
 jtag_nsrst_delay 100
 jtag_ntrst_delay 100
 
@@ -10,18 +17,27 @@ jtag_device 8 0x1 0x1 0xfe
 jtag_device 4 0x1 0xf 0xe
 jtag_device 5 0x1 0x1 0x1e
 
-#target <type> <startup mode>
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
-target arm966e little reset_halt 1 arm966e
-run_and_halt_time 0 30
+target create target0 arm966e -endian little -chain-position 1 -variant arm966e
+
+[new_target_name] configure -event reset-start { jtag_rclk 16 }
+
+[new_target_name] configure -event reset-init {
+       # We can increase speed now that we know the target is halted.
+       jtag_rclk 3000
+       
+       # -- Enable 96K RAM
+       # PFQBC enabled / DTCM & AHB wait-states disabled
+       mww 0x5C002034 0x0191 
 
-target_script 0 reset event/str912_reset.script
+       str9x flash_config 0 4 2 0 0x80000
+       flash protect 0 0 7 off
+}
 
-working_area 0 0x50000000 16384 nobackup
+[new_target_name] configure -work-area-virt 0 -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0
 
 #flash bank str9x <base> <size> 0 0 <target#> <variant>
 flash bank str9x 0x00000000 0x00080000 0 0 0
 flash bank str9x 0x00080000 0x00008000 0 0 0
 
 # For more information about the configuration files, take a look at:
-# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
+# openocd.texi

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