wip
authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Wed, 5 Nov 2008 09:06:34 +0000 (09:06 +0000)
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Wed, 5 Nov 2008 09:06:34 +0000 (09:06 +0000)
git-svn-id: svn://svn.berlios.de/openocd/trunk@1136 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/target/target/imote2.cfg [new file with mode: 0644]
src/target/target/is5114.cfg [new file with mode: 0644]
src/target/target/str910-eval.cfg [new file with mode: 0644]

diff --git a/src/target/target/imote2.cfg b/src/target/target/imote2.cfg
new file mode 100644 (file)
index 0000000..a02a8d3
--- /dev/null
@@ -0,0 +1,24 @@
+# iMote2
+#
+# PXA271 and an Intel Strataflash of 32 Megabytes (p30)
+# 
+# Marvell/Intel PXA270 Script
+# set jtag_nsrst_delay to the delay introduced by your reset circuit
+# the rest of the needed delays are built into the openocd program
+jtag_nsrst_delay 800 
+# set the jtag_ntrst_delay to the delay introduced by a reset circuit
+# the rest of the needed delays are built into the openocd program
+jtag_ntrst_delay 0
+#use combined on interfaces or targets that can\92t set TRST/SRST separately
+reset_config trst_and_srst separate
+#jtag scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 7 0x1 0x7f 0x7e
+target xscale little 0 pxa27x
+# maps to PXA internal RAM. If you are using a PXA255
+# you must initialize SDRAM or leave this option off
+working_area 0 0x5c000000 0x10000 nobackup
+
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+# works for P30 flash
+flash bank cfi 0x00000000 0x2000000 2 2 0
diff --git a/src/target/target/is5114.cfg b/src/target/target/is5114.cfg
new file mode 100644 (file)
index 0000000..a370ff3
--- /dev/null
@@ -0,0 +1,20 @@
+# script for Insilica IS-5114\r
+\r
+# jtag speed. We need to stick to 16kHz until we've finished reset.\r
+jtag_rclk 16\r
+\r
+reset_config trst_and_srst\r
+\r
+jtag_device 8 0x1 0x1 0xfe\r
+jtag_device 4 0x1 0xf 0xe\r
+jtag_device 5 0x1 0x1 0x1e\r
+\r
+#arm946e-s and \r
+target arm966e little 1 arm966e\r
+\r
+[new_target_name] configure -event reset-start { jtag_rclk 16 }\r
+[new_target_name] configure -event reset-init {\r
+       # We can increase speed now that we know the target is halted.\r
+       jtag_rclk 3000\r
+}\r
+working_area 0 0x50000000 16384 nobackup\r
diff --git a/src/target/target/str910-eval.cfg b/src/target/target/str910-eval.cfg
new file mode 100644 (file)
index 0000000..b77e0ea
--- /dev/null
@@ -0,0 +1,19 @@
+# str910-eval eval board\r
+# \r
+# Need reset scripts \r
+reset_config trst_and_srst\r
+\r
+jtag_device 8 0x1 0x1 0xfe\r
+jtag_device 4 0x1 0xf 0xe\r
+jtag_device 5 0x1 0x1 0x1e\r
+\r
+target arm966e little reset_halt 1 arm966e\r
+\r
+working_area 0 0x50000000 16384 nobackup\r
+\r
+flash bank str9xpec 0x00000000 0x00080000 0 0 0\r
+\r
+str9xpec enable_turbo 0\r
+str9xpec options_read 0\r
+str9xpec options_cmap 0 bank 1\r
+str9xpec options_write 0\r

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