static int dsp563xx_read_core_reg(struct target *target, int num)
{
uint32_t reg_value;
- struct dsp563xx_core_reg *dsp563xx_core_reg;
struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
if ((num < 0) || (num >= DSP563XX_NUMCOREREGS))
return ERROR_INVALID_ARGUMENTS;
- dsp563xx_core_reg = dsp563xx->core_cache->reg_list[num].arch_info;
reg_value = dsp563xx->core_regs[num];
buf_set_u32(dsp563xx->core_cache->reg_list[num].value, 0, 32, reg_value);
dsp563xx->core_cache->reg_list[num].valid = 1;
static int dsp563xx_write_core_reg(struct target *target, int num)
{
uint32_t reg_value;
- struct dsp563xx_core_reg *dsp563xx_core_reg;
struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
if ((num < 0) || (num >= DSP563XX_NUMCOREREGS))
return ERROR_INVALID_ARGUMENTS;
reg_value = buf_get_u32(dsp563xx->core_cache->reg_list[num].value, 0, 32);
- dsp563xx_core_reg = dsp563xx->core_cache->reg_list[num].arch_info;
dsp563xx->core_regs[num] = reg_value;
dsp563xx->core_cache->reg_list[num].valid = 1;
dsp563xx->core_cache->reg_list[num].dirty = 0;
static int dsp563xx_reg_ssh_read(struct target *target)
{
int err;
- uint32_t sp, sc, ep;
+ uint32_t sp;
struct dsp563xx_core_reg *arch_info;
struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
/* get a valid stack count */
if ((err = dsp563xx_read_register(target, DSP563XX_REG_IDX_SC, 0)) != ERROR_OK)
return err;
- sc = dsp563xx->core_regs[DSP563XX_REG_IDX_SC];
+
if ((err = dsp563xx_write_register(target, DSP563XX_REG_IDX_SC, 0)) != ERROR_OK)
return err;
/* get a valid extended pointer */
if ((err = dsp563xx_read_register(target, DSP563XX_REG_IDX_EP, 0)) != ERROR_OK)
return err;
- ep = dsp563xx->core_regs[DSP563XX_REG_IDX_EP];
+
if ((err = dsp563xx_write_register(target, DSP563XX_REG_IDX_EP, 0)) != ERROR_OK)
return err;
static int dsp563xx_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
{
int err;
- struct dsp563xx_core_reg *dsp563xx_core_reg;
struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
/* check if pc was changed and resume want to execute the next address
if ( current && dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_PC].dirty )
{
dsp563xx_write_core_reg(target,DSP563XX_REG_IDX_PC);
- dsp563xx_core_reg = dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_PC].arch_info;
address = dsp563xx->core_regs[DSP563XX_REG_IDX_PC];
current = 0;
}
int err;
uint32_t once_status;
uint32_t dr_in, cnt;
- struct dsp563xx_core_reg *dsp563xx_core_reg;
struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
if (target->state != TARGET_HALTED)
if ( current && dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_PC].dirty )
{
dsp563xx_write_core_reg(target,DSP563XX_REG_IDX_PC);
- dsp563xx_core_reg = dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_PC].arch_info;
address = dsp563xx->core_regs[DSP563XX_REG_IDX_PC];
current = 0;
}
return err;
if ((err = dsp563xx_once_execute_sw_ir(target->tap, 0, 0x08D13C)) != ERROR_OK)
return err;
- if ((err = dsp563xx_once_reg_read(target->tap, 0, DSP563XX_ONCE_OGDBR, (uint32_t*)b)) != ERROR_OK)
+ if ((err = dsp563xx_once_reg_read(target->tap, 0, DSP563XX_ONCE_OGDBR, (uint32_t*)(void *)b)) != ERROR_OK)
return err;
b += 4;
}
for (i = 0; i < x; i++)
{
- data = *((uint32_t*)b) & 0x00FFFFFF;
+ data = buf_get_u32(b, 0, 32) & 0x00FFFFFF;
// LOG_DEBUG("R: %08X", *((uint32_t*)b));
target_buffer_set_u32(target, b, data);
b += 4;
for(i=0,i1=0;i<count;i+=2,i1++)
{
- ((uint32_t*)buffer)[i] = ((uint32_t*)buffer_y)[i1];
- ((uint32_t*)buffer)[i] = ((uint32_t*)buffer_x)[i1];
+ buf_set_u32(buffer + i*sizeof(uint32_t), 0, 32, buf_get_u32(buffer_y+i1*sizeof(uint32_t), 0, 32));
+ buf_set_u32(buffer + (i + 1) *sizeof(uint32_t), 0, 32, buf_get_u32(buffer_x+i1*sizeof(uint32_t), 0, 32));
}
free(buffer_y);
return dsp563xx_read_memory(target, dsp563xx_get_default_memory(), address, size, count, buffer);
}
-static int dsp563xx_write_memory_core(struct target *target, int mem_type, uint32_t address, uint32_t size, uint32_t count, uint8_t * buffer)
+static int dsp563xx_write_memory_core(struct target *target, int mem_type, uint32_t address, uint32_t size, uint32_t count, const uint8_t * buffer)
{
int err;
struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
uint32_t i, x;
uint32_t data, move_cmd = 0;
- uint8_t *b;
+ const uint8_t *b;
LOG_DEBUG("memtype: %d address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", mem_type,address, size, count);
return ERROR_OK;
}
-static int dsp563xx_write_memory(struct target *target, int mem_type, uint32_t address, uint32_t size, uint32_t count, uint8_t * buffer)
+static int dsp563xx_write_memory(struct target *target, int mem_type, uint32_t address, uint32_t size, uint32_t count, const uint8_t * buffer)
{
int err;
uint32_t i,i1;
for(i=0,i1=0;i<count;i+=2,i1++)
{
- ((uint32_t*)buffer_y)[i1] = ((uint32_t*)buffer)[i];
- ((uint32_t*)buffer_x)[i1] = ((uint32_t*)buffer)[i+1];
+ buf_set_u32(buffer_y + i1*sizeof(uint32_t), 0, 32, buf_get_u32(buffer+i*sizeof(uint32_t), 0, 32));
+ buf_set_u32(buffer_x + i1*sizeof(uint32_t), 0, 32, buf_get_u32(buffer+(i+1)*sizeof(uint32_t), 0, 32));
}
err = dsp563xx_write_memory_core(target,MEM_Y,address,size,count/2,buffer_y);
return ERROR_OK;
}
-static int dsp563xx_write_memory_default(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t * buffer)
+static int dsp563xx_write_memory_default(struct target *target, uint32_t address, uint32_t size, uint32_t count, const uint8_t * buffer)
{
return dsp563xx_write_memory(target, dsp563xx_get_default_memory(), address, size, count, buffer);
}
-static int dsp563xx_bulk_write_memory_default(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
+static int dsp563xx_bulk_write_memory_default(struct target *target, uint32_t address, uint32_t count, const uint8_t *buffer)
{
return dsp563xx_write_memory(target, dsp563xx_get_default_memory(), address, 4, count, buffer);
}