1 # If you want to use the VJTAG TAP or the XILINX BSCAN,
2 # you must set your FPGA TAP ID here
4 set FPGATAPID 0x020b30dd
6 # Choose your TAP core (VJTAG , MOHOR or XILINX_BSCAN)
11 source [find target/or1k.cfg]
13 # Set the adapter speed
16 # Enable the target description feature
17 gdb_target_description enable
19 # Add a new register in the cpu register list. This register will be
20 # included in the generated target descriptor file.
21 # format is addreg [name] [address] [feature] [reg_group]
22 addreg rtest 0x1234 org.gnu.gdb.or1k.group0 system
24 # Override default init_reset
25 proc init_reset {mode} {
30 # Target initialization
32 echo "Halting processor"
35 foreach name [target names] {
36 set y [$name cget -endian]
37 set z [$name cget -type]
38 puts [format "Chip is %s, Endian: %s, type: %s" \
42 set c_blue "\033\[01;34m"
43 set c_reset "\033\[0m"
45 puts [format "%sTarget ready...%s" $c_blue $c_reset]
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