1 # Keil MCB1700 PCB with 1768
3 # Reset init script sets it to 100MHz
6 source [find target/lpc17xx.cfg]
11 $_TARGETNAME configure -event reset-start {
12 # Start *real slow* as we do not know the
13 # state the boot rom left the clock in
17 # Set up 100MHz clock to CPU
18 $_TARGETNAME configure -event reset-init {
19 # PLL0CON: Disable PLL
20 mww 0x400FC080 0x00000000
22 mww 0x400FC08C 0x000000AA
24 mww 0x400FC08C 0x00000055
26 # CCLK=PLL/4 (=100 MHz)
27 mww 0x400FC104 0x00000003
28 # CLKSRCSEL: Clock source = internal RC oscillator
29 mww 0x400FC10C 0x00000000
31 # PLL0CFG: M=50,N=1 -> PLL=400 MHz
32 mww 0x400FC084 0x00000031
34 mww 0x400FC08C 0x000000AA
36 mww 0x400FC08C 0x00000055
39 mww 0x400FC080 0x00000001
41 mww 0x400FC08C 0x000000AA
43 mww 0x400FC08C 0x00000055
47 # PLL0CON: Connect PLL
48 mww 0x400FC080 0x00000003
50 mww 0x400FC08C 0x000000AA
52 mww 0x400FC08C 0x00000055
54 # Dividing CPU clock by 8 should be pretty conservative
58 adapter_khz [expr $MCB1700_CCLK / 8]
60 # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
61 # "User Flash Mode" where interrupt vectors are _not_ remapped,
62 # and reside in flash instead).
64 # See Table 612. Memory Mapping Control register (MEMMAP - 0x400F C040) bit description
65 # Bit Symbol Value Description Reset
67 # 0 MAP Memory map control. 0
68 # 0 Boot mode. A portion of the Boot ROM is mapped to address 0.
69 # 1 User mode. The on-chip Flash memory is mapped to address 0.
70 # 31:1 - Reserved. The value read from a reserved bit is not defined. NA
72 # http://ics.nxp.com/support/documents/microcontrollers/?scope=LPC1768&type=user
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