1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2007,2008 Øyvind Harboe *
6 * oyvind.harboe@zylin.com *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
28 #include <jtag/interface.h>
29 #include <jtag/commands.h>
32 * Function bitbang_stableclocks
33 * issues a number of clock cycles while staying in a stable state.
34 * Because the TMS value required to stay in the RESET state is a 1, whereas
35 * the TMS value required to stay in any of the other stable states is a 0,
36 * this function checks the current stable state to decide on the value of TMS
39 static void bitbang_stableclocks(int num_cycles
);
42 struct bitbang_interface
*bitbang_interface
;
44 /* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work!
46 * Set this to 1 and str912 reset halt will fail.
48 * If someone can submit a patch with an explanation it will be greatly
49 * appreciated, but as far as I can tell (ØH) DCLK is generated upon
50 * clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
51 * The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
52 * state". With hardware there is no such thing as *while* in a state. There
53 * are only edges. So clk => 0 is in fact a very subtle state transition that
54 * happens *while* in the TAP_IDLE state. "#&¤"#¤&"#&"#&
56 * For "reset halt" the last thing that happens before srst is asserted
57 * is that the breakpoint is set up. If DCLK is not wiggled one last
58 * time before the reset, then the breakpoint is not set up and
59 * "reset halt" will fail to halt.
62 #define CLOCK_IDLE() 0
65 /* The bitbang driver leaves the TCK 0 when in idle */
66 static void bitbang_end_state(tap_state_t state
)
68 if (tap_is_state_stable(state
))
69 tap_set_end_state(state
);
72 LOG_ERROR("BUG: %i is not a valid end state", state
);
77 static void bitbang_state_move(int skip
)
80 uint8_t tms_scan
= tap_get_tms_path(tap_get_state(), tap_get_end_state());
81 int tms_count
= tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
83 for (i
= skip
; i
< tms_count
; i
++)
85 tms
= (tms_scan
>> i
) & 1;
86 bitbang_interface
->write(0, tms
, 0);
87 bitbang_interface
->write(1, tms
, 0);
89 bitbang_interface
->write(CLOCK_IDLE(), tms
, 0);
91 tap_set_state(tap_get_end_state());
96 * Clock a bunch of TMS (or SWDIO) transitions, to change the JTAG
97 * (or SWD) state machine.
99 static int bitbang_execute_tms(struct jtag_command
*cmd
)
101 unsigned num_bits
= cmd
->cmd
.tms
->num_bits
;
102 const uint8_t *bits
= cmd
->cmd
.tms
->bits
;
104 DEBUG_JTAG_IO("TMS: %d bits", num_bits
);
107 for (unsigned i
= 0; i
< num_bits
; i
++)
109 tms
= ((bits
[i
/8] >> (i
% 8)) & 1);
110 bitbang_interface
->write(0, tms
, 0);
111 bitbang_interface
->write(1, tms
, 0);
113 bitbang_interface
->write(CLOCK_IDLE(), tms
, 0);
119 static void bitbang_path_move(struct pathmove_command
*cmd
)
121 int num_states
= cmd
->num_states
;
128 if (tap_state_transition(tap_get_state(), false) == cmd
->path
[state_count
])
132 else if (tap_state_transition(tap_get_state(), true) == cmd
->path
[state_count
])
138 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(tap_get_state()), tap_state_name(cmd
->path
[state_count
]));
142 bitbang_interface
->write(0, tms
, 0);
143 bitbang_interface
->write(1, tms
, 0);
145 tap_set_state(cmd
->path
[state_count
]);
150 bitbang_interface
->write(CLOCK_IDLE(), tms
, 0);
152 tap_set_end_state(tap_get_state());
155 static void bitbang_runtest(int num_cycles
)
159 tap_state_t saved_end_state
= tap_get_end_state();
161 /* only do a state_move when we're not already in IDLE */
162 if (tap_get_state() != TAP_IDLE
)
164 bitbang_end_state(TAP_IDLE
);
165 bitbang_state_move(0);
168 /* execute num_cycles */
169 for (i
= 0; i
< num_cycles
; i
++)
171 bitbang_interface
->write(0, 0, 0);
172 bitbang_interface
->write(1, 0, 0);
174 bitbang_interface
->write(CLOCK_IDLE(), 0, 0);
176 /* finish in end_state */
177 bitbang_end_state(saved_end_state
);
178 if (tap_get_state() != tap_get_end_state())
179 bitbang_state_move(0);
183 static void bitbang_stableclocks(int num_cycles
)
185 int tms
= (tap_get_state() == TAP_RESET
? 1 : 0);
188 /* send num_cycles clocks onto the cable */
189 for (i
= 0; i
< num_cycles
; i
++)
191 bitbang_interface
->write(1, tms
, 0);
192 bitbang_interface
->write(0, tms
, 0);
198 static void bitbang_scan(bool ir_scan
, enum scan_type type
, uint8_t *buffer
, int scan_size
)
200 tap_state_t saved_end_state
= tap_get_end_state();
203 if (!((!ir_scan
&& (tap_get_state() == TAP_DRSHIFT
)) || (ir_scan
&& (tap_get_state() == TAP_IRSHIFT
))))
206 bitbang_end_state(TAP_IRSHIFT
);
208 bitbang_end_state(TAP_DRSHIFT
);
210 bitbang_state_move(0);
211 bitbang_end_state(saved_end_state
);
214 for (bit_cnt
= 0; bit_cnt
< scan_size
; bit_cnt
++)
217 int tms
= (bit_cnt
== scan_size
-1) ? 1 : 0;
219 int bytec
= bit_cnt
/8;
220 int bcval
= 1 << (bit_cnt
% 8);
222 /* if we're just reading the scan, but don't care about the output
223 * default to outputting 'low', this also makes valgrind traces more readable,
224 * as it removes the dependency on an uninitialised value
227 if ((type
!= SCAN_IN
) && (buffer
[bytec
] & bcval
))
230 bitbang_interface
->write(0, tms
, tdi
);
232 if (type
!= SCAN_OUT
)
233 val
= bitbang_interface
->read();
235 bitbang_interface
->write(1, tms
, tdi
);
237 if (type
!= SCAN_OUT
)
240 buffer
[bytec
] |= bcval
;
242 buffer
[bytec
] &= ~bcval
;
246 if (tap_get_state() != tap_get_end_state())
248 /* we *KNOW* the above loop transitioned out of
249 * the shift state, so we skip the first state
250 * and move directly to the end state.
252 bitbang_state_move(1);
256 int bitbang_execute_queue(void)
258 struct jtag_command
*cmd
= jtag_command_queue
; /* currently processed command */
264 if (!bitbang_interface
)
266 LOG_ERROR("BUG: Bitbang interface called, but not yet initialized");
270 /* return ERROR_OK, unless a jtag_read_buffer returns a failed check
271 * that wasn't handled by a caller-provided error handler
275 if (bitbang_interface
->blink
)
276 bitbang_interface
->blink(1);
283 #ifdef _DEBUG_JTAG_IO_
284 LOG_DEBUG("reset trst: %i srst %i", cmd
->cmd
.reset
->trst
, cmd
->cmd
.reset
->srst
);
286 if ((cmd
->cmd
.reset
->trst
== 1) || (cmd
->cmd
.reset
->srst
&& (jtag_get_reset_config() & RESET_SRST_PULLS_TRST
)))
288 tap_set_state(TAP_RESET
);
290 bitbang_interface
->reset(cmd
->cmd
.reset
->trst
, cmd
->cmd
.reset
->srst
);
293 #ifdef _DEBUG_JTAG_IO_
294 LOG_DEBUG("runtest %i cycles, end in %s", cmd
->cmd
.runtest
->num_cycles
, tap_state_name(cmd
->cmd
.runtest
->end_state
));
296 bitbang_end_state(cmd
->cmd
.runtest
->end_state
);
297 bitbang_runtest(cmd
->cmd
.runtest
->num_cycles
);
300 case JTAG_STABLECLOCKS
:
301 /* this is only allowed while in a stable state. A check for a stable
302 * state was done in jtag_add_clocks()
304 bitbang_stableclocks(cmd
->cmd
.stableclocks
->num_cycles
);
308 #ifdef _DEBUG_JTAG_IO_
309 LOG_DEBUG("statemove end in %s", tap_state_name(cmd
->cmd
.statemove
->end_state
));
311 bitbang_end_state(cmd
->cmd
.statemove
->end_state
);
312 bitbang_state_move(0);
315 #ifdef _DEBUG_JTAG_IO_
316 LOG_DEBUG("pathmove: %i states, end in %s", cmd
->cmd
.pathmove
->num_states
,
317 tap_state_name(cmd
->cmd
.pathmove
->path
[cmd
->cmd
.pathmove
->num_states
- 1]));
319 bitbang_path_move(cmd
->cmd
.pathmove
);
322 #ifdef _DEBUG_JTAG_IO_
323 LOG_DEBUG("%s scan end in %s", (cmd
->cmd
.scan
->ir_scan
) ? "IR" : "DR", tap_state_name(cmd
->cmd
.scan
->end_state
));
325 bitbang_end_state(cmd
->cmd
.scan
->end_state
);
326 scan_size
= jtag_build_buffer(cmd
->cmd
.scan
, &buffer
);
327 type
= jtag_scan_type(cmd
->cmd
.scan
);
328 bitbang_scan(cmd
->cmd
.scan
->ir_scan
, type
, buffer
, scan_size
);
329 if (jtag_read_buffer(buffer
, cmd
->cmd
.scan
) != ERROR_OK
)
330 retval
= ERROR_JTAG_QUEUE_FAILED
;
335 #ifdef _DEBUG_JTAG_IO_
336 LOG_DEBUG("sleep %" PRIi32
, cmd
->cmd
.sleep
->us
);
338 jtag_sleep(cmd
->cmd
.sleep
->us
);
341 retval
= bitbang_execute_tms(cmd
);
344 LOG_ERROR("BUG: unknown JTAG command type encountered");
349 if (bitbang_interface
->blink
)
350 bitbang_interface
->blink(0);
Linking to existing account procedure
If you already have an account and want to add another login method
you
MUST first sign in with your existing account and
then change URL to read
https://review.openocd.org/login/?link
to get to this page again but this time it'll work for linking. Thank you.
SSH host keys fingerprints
1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=.. |
|+o.. . |
|*.o . . |
|+B . . . |
|Bo. = o S |
|Oo.+ + = |
|oB=.* = . o |
| =+=.+ + E |
|. .=o . o |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)