1 /***************************************************************************
2 * Copyright (C) 2011 by Mathias Kuester *
5 * Copyright (C) 2011 sleep(5) ltd *
6 * tomas@sleepfive.com *
8 * Copyright (C) 2012 by Christopher D. Kilgour *
9 * techie at whiterocker.com *
11 * Copyright (C) 2013 Nemui Trinomius *
12 * nemuisan_kawausogasuki@live.jp *
14 * Copyright (C) 2015 Tomas Vanek *
17 * This program is free software; you can redistribute it and/or modify *
18 * it under the terms of the GNU General Public License as published by *
19 * the Free Software Foundation; either version 2 of the License, or *
20 * (at your option) any later version. *
22 * This program is distributed in the hope that it will be useful, *
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
25 * GNU General Public License for more details. *
27 * You should have received a copy of the GNU General Public License *
28 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
29 ***************************************************************************/
35 #include "jtag/interface.h"
37 #include <helper/binarybuffer.h>
38 #include <helper/time_support.h>
39 #include <target/target_type.h>
40 #include <target/algorithm.h>
41 #include <target/armv7m.h>
42 #include <target/cortex_m.h>
45 * Implementation Notes
47 * The persistent memories in the Kinetis chip families K10 through
48 * K70 are all manipulated with the Flash Memory Module. Some
49 * variants call this module the FTFE, others call it the FTFL. To
50 * indicate that both are considered here, we use FTFX.
52 * Within the module, according to the chip variant, the persistent
53 * memory is divided into what Freescale terms Program Flash, FlexNVM,
54 * and FlexRAM. All chip variants have Program Flash. Some chip
55 * variants also have FlexNVM and FlexRAM, which always appear
58 * A given Kinetis chip may have 1, 2 or 4 blocks of flash. Here we map
59 * each block to a separate bank. Each block size varies by chip and
60 * may be determined by the read-only SIM_FCFG1 register. The sector
61 * size within each bank/block varies by chip, and may be 1, 2 or 4k.
62 * The sector size may be different for flash and FlexNVM.
64 * The first half of the flash (1 or 2 blocks) is always Program Flash
65 * and always starts at address 0x00000000. The "PFLSH" flag, bit 23
66 * of the read-only SIM_FCFG2 register, determines whether the second
67 * half of the flash is also Program Flash or FlexNVM+FlexRAM. When
68 * PFLSH is set, the second from the first half. When PFLSH is clear,
69 * the second half of flash is FlexNVM and always starts at address
70 * 0x10000000. FlexRAM, which is also present when PFLSH is clear,
71 * always starts at address 0x14000000.
73 * The Flash Memory Module provides a register set where flash
74 * commands are loaded to perform flash operations like erase and
75 * program. Different commands are available depending on whether
76 * Program Flash or FlexNVM/FlexRAM is being manipulated. Although
77 * the commands used are quite consistent between flash blocks, the
78 * parameters they accept differ according to the flash sector size.
83 #define FCF_ADDRESS 0x00000400
87 #define FCF_FDPROT 0xf
90 #define FLEXRAM 0x14000000
92 #define FMC_PFB01CR 0x4001f004
93 #define FTFx_FSTAT 0x40020000
94 #define FTFx_FCNFG 0x40020001
95 #define FTFx_FCCOB3 0x40020004
96 #define FTFx_FPROT3 0x40020010
97 #define FTFx_FDPROT 0x40020017
98 #define SIM_SDID 0x40048024
99 #define SIM_SOPT1 0x40047000
100 #define SIM_FCFG1 0x4004804c
101 #define SIM_FCFG2 0x40048050
102 #define WDOG_STCTRH 0x40052000
103 #define SMC_PMCTRL 0x4007E001
104 #define SMC_PMSTAT 0x4007E003
105 #define MCM_PLACR 0xF000300C
108 #define PM_STAT_RUN 0x01
109 #define PM_STAT_VLPR 0x04
110 #define PM_CTRL_RUNM_RUN 0x00
113 #define FTFx_CMD_BLOCKSTAT 0x00
114 #define FTFx_CMD_SECTSTAT 0x01
115 #define FTFx_CMD_LWORDPROG 0x06
116 #define FTFx_CMD_SECTERASE 0x09
117 #define FTFx_CMD_SECTWRITE 0x0b
118 #define FTFx_CMD_MASSERASE 0x44
119 #define FTFx_CMD_PGMPART 0x80
120 #define FTFx_CMD_SETFLEXRAM 0x81
122 /* The older Kinetis K series uses the following SDID layout :
129 * The newer Kinetis series uses the following SDID layout :
131 * Bit 27-24 : SUBFAMID
132 * Bit 23-20 : SERIESID
133 * Bit 19-16 : SRAMSIZE
135 * Bit 6-4 : Reserved (0)
138 * We assume that if bits 31-16 are 0 then it's an older
142 #define KINETIS_SOPT1_RAMSIZE_MASK 0x0000F000
143 #define KINETIS_SOPT1_RAMSIZE_K24FN1M 0x0000B000
145 #define KINETIS_SDID_K_SERIES_MASK 0x0000FFFF
147 #define KINETIS_SDID_DIEID_MASK 0x00000F80
149 #define KINETIS_SDID_DIEID_K22FN128 0x00000680 /* smaller pflash with FTFA */
150 #define KINETIS_SDID_DIEID_K22FN256 0x00000A80
151 #define KINETIS_SDID_DIEID_K22FN512 0x00000E80
152 #define KINETIS_SDID_DIEID_K24FN256 0x00000700
154 #define KINETIS_SDID_DIEID_K24FN1M 0x00000300 /* Detect Errata 7534 */
156 /* We can't rely solely on the FAMID field to determine the MCU
157 * type since some FAMID values identify multiple MCUs with
158 * different flash sector sizes (K20 and K22 for instance).
159 * Therefore we combine it with the DIEID bits which may possibly
160 * break if Freescale bumps the DIEID for a particular MCU. */
161 #define KINETIS_K_SDID_TYPE_MASK 0x00000FF0
162 #define KINETIS_K_SDID_K10_M50 0x00000000
163 #define KINETIS_K_SDID_K10_M72 0x00000080
164 #define KINETIS_K_SDID_K10_M100 0x00000100
165 #define KINETIS_K_SDID_K10_M120 0x00000180
166 #define KINETIS_K_SDID_K11 0x00000220
167 #define KINETIS_K_SDID_K12 0x00000200
168 #define KINETIS_K_SDID_K20_M50 0x00000010
169 #define KINETIS_K_SDID_K20_M72 0x00000090
170 #define KINETIS_K_SDID_K20_M100 0x00000110
171 #define KINETIS_K_SDID_K20_M120 0x00000190
172 #define KINETIS_K_SDID_K21_M50 0x00000230
173 #define KINETIS_K_SDID_K21_M120 0x00000330
174 #define KINETIS_K_SDID_K22_M50 0x00000210
175 #define KINETIS_K_SDID_K22_M120 0x00000310
176 #define KINETIS_K_SDID_K30_M72 0x000000A0
177 #define KINETIS_K_SDID_K30_M100 0x00000120
178 #define KINETIS_K_SDID_K40_M72 0x000000B0
179 #define KINETIS_K_SDID_K40_M100 0x00000130
180 #define KINETIS_K_SDID_K50_M72 0x000000E0
181 #define KINETIS_K_SDID_K51_M72 0x000000F0
182 #define KINETIS_K_SDID_K53 0x00000170
183 #define KINETIS_K_SDID_K60_M100 0x00000140
184 #define KINETIS_K_SDID_K60_M150 0x000001C0
185 #define KINETIS_K_SDID_K70_M150 0x000001D0
187 #define KINETIS_SDID_SERIESID_MASK 0x00F00000
188 #define KINETIS_SDID_SERIESID_K 0x00000000
189 #define KINETIS_SDID_SERIESID_KL 0x00100000
190 #define KINETIS_SDID_SERIESID_KW 0x00500000
191 #define KINETIS_SDID_SERIESID_KV 0x00600000
193 #define KINETIS_SDID_SUBFAMID_MASK 0x0F000000
194 #define KINETIS_SDID_SUBFAMID_KX0 0x00000000
195 #define KINETIS_SDID_SUBFAMID_KX1 0x01000000
196 #define KINETIS_SDID_SUBFAMID_KX2 0x02000000
197 #define KINETIS_SDID_SUBFAMID_KX3 0x03000000
198 #define KINETIS_SDID_SUBFAMID_KX4 0x04000000
199 #define KINETIS_SDID_SUBFAMID_KX5 0x05000000
200 #define KINETIS_SDID_SUBFAMID_KX6 0x06000000
202 #define KINETIS_SDID_FAMILYID_MASK 0xF0000000
203 #define KINETIS_SDID_FAMILYID_K0X 0x00000000
204 #define KINETIS_SDID_FAMILYID_K1X 0x10000000
205 #define KINETIS_SDID_FAMILYID_K2X 0x20000000
206 #define KINETIS_SDID_FAMILYID_K3X 0x30000000
207 #define KINETIS_SDID_FAMILYID_K4X 0x40000000
208 #define KINETIS_SDID_FAMILYID_K6X 0x60000000
209 #define KINETIS_SDID_FAMILYID_K7X 0x70000000
211 struct kinetis_flash_bank
{
213 uint32_t sector_size
;
214 uint32_t max_flash_prog_size
;
215 uint32_t protection_size
;
216 uint32_t prog_base
; /* base address for FTFx operations */
217 /* same as bank->base for pflash, differs for FlexNVM */
218 uint32_t protection_block
; /* number of first protection block in this bank */
232 FS_PROGRAM_SECTOR
= 1,
233 FS_PROGRAM_LONGWORD
= 2,
234 FS_PROGRAM_PHRASE
= 4, /* Unsupported */
235 FS_INVALIDATE_CACHE_K
= 8,
236 FS_INVALIDATE_CACHE_L
= 0x10,
242 #define MDM_REG_STAT 0x00
243 #define MDM_REG_CTRL 0x04
244 #define MDM_REG_ID 0xfc
246 #define MDM_STAT_FMEACK (1<<0)
247 #define MDM_STAT_FREADY (1<<1)
248 #define MDM_STAT_SYSSEC (1<<2)
249 #define MDM_STAT_SYSRES (1<<3)
250 #define MDM_STAT_FMEEN (1<<5)
251 #define MDM_STAT_BACKDOOREN (1<<6)
252 #define MDM_STAT_LPEN (1<<7)
253 #define MDM_STAT_VLPEN (1<<8)
254 #define MDM_STAT_LLSMODEXIT (1<<9)
255 #define MDM_STAT_VLLSXMODEXIT (1<<10)
256 #define MDM_STAT_CORE_HALTED (1<<16)
257 #define MDM_STAT_CORE_SLEEPDEEP (1<<17)
258 #define MDM_STAT_CORESLEEPING (1<<18)
260 #define MDM_CTRL_FMEIP (1<<0)
261 #define MDM_CTRL_DBG_DIS (1<<1)
262 #define MDM_CTRL_DBG_REQ (1<<2)
263 #define MDM_CTRL_SYS_RES_REQ (1<<3)
264 #define MDM_CTRL_CORE_HOLD_RES (1<<4)
265 #define MDM_CTRL_VLLSX_DBG_REQ (1<<5)
266 #define MDM_CTRL_VLLSX_DBG_ACK (1<<6)
267 #define MDM_CTRL_VLLSX_STAT_ACK (1<<7)
269 #define MDM_ACCESS_TIMEOUT 500 /* msec */
272 static bool allow_fcf_writes
;
273 static uint8_t fcf_fopt
= 0xff;
276 struct flash_driver kinetis_flash
;
277 static int kinetis_write_inner(struct flash_bank
*bank
, const uint8_t *buffer
,
278 uint32_t offset
, uint32_t count
);
279 static int kinetis_auto_probe(struct flash_bank
*bank
);
282 static int kinetis_mdm_write_register(struct adiv5_dap
*dap
, unsigned reg
, uint32_t value
)
285 LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32
, reg
, value
);
287 retval
= dap_queue_ap_write(dap_ap(dap
, MDM_AP
), reg
, value
);
288 if (retval
!= ERROR_OK
) {
289 LOG_DEBUG("MDM: failed to queue a write request");
293 retval
= dap_run(dap
);
294 if (retval
!= ERROR_OK
) {
295 LOG_DEBUG("MDM: dap_run failed");
303 static int kinetis_mdm_read_register(struct adiv5_dap
*dap
, unsigned reg
, uint32_t *result
)
307 retval
= dap_queue_ap_read(dap_ap(dap
, MDM_AP
), reg
, result
);
308 if (retval
!= ERROR_OK
) {
309 LOG_DEBUG("MDM: failed to queue a read request");
313 retval
= dap_run(dap
);
314 if (retval
!= ERROR_OK
) {
315 LOG_DEBUG("MDM: dap_run failed");
319 LOG_DEBUG("MDM_REG[0x%02x]: %08" PRIX32
, reg
, *result
);
323 static int kinetis_mdm_poll_register(struct adiv5_dap
*dap
, unsigned reg
,
324 uint32_t mask
, uint32_t value
, uint32_t timeout_ms
)
328 int64_t ms_timeout
= timeval_ms() + timeout_ms
;
331 retval
= kinetis_mdm_read_register(dap
, reg
, &val
);
332 if (retval
!= ERROR_OK
|| (val
& mask
) == value
)
336 } while (timeval_ms() < ms_timeout
);
338 LOG_DEBUG("MDM: polling timed out");
343 * This command can be used to break a watchdog reset loop when
344 * connecting to an unsecured target. Unlike other commands, halt will
345 * automatically retry as it does not know how far into the boot process
346 * it is when the command is called.
348 COMMAND_HANDLER(kinetis_mdm_halt
)
350 struct target
*target
= get_current_target(CMD_CTX
);
351 struct cortex_m_common
*cortex_m
= target_to_cm(target
);
352 struct adiv5_dap
*dap
= cortex_m
->armv7m
.arm
.dap
;
356 int64_t ms_timeout
= timeval_ms() + MDM_ACCESS_TIMEOUT
;
359 LOG_ERROR("Cannot perform halt with a high-level adapter");
366 kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, MDM_CTRL_CORE_HOLD_RES
);
370 retval
= kinetis_mdm_read_register(dap
, MDM_REG_STAT
, &stat
);
371 if (retval
!= ERROR_OK
) {
372 LOG_DEBUG("MDM: failed to read MDM_REG_STAT");
376 /* Repeat setting MDM_CTRL_CORE_HOLD_RES until system is out of
377 * reset with flash ready and without security
379 if ((stat
& (MDM_STAT_FREADY
| MDM_STAT_SYSSEC
| MDM_STAT_SYSRES
))
380 == (MDM_STAT_FREADY
| MDM_STAT_SYSRES
))
383 if (timeval_ms() >= ms_timeout
) {
384 LOG_ERROR("MDM: halt timed out");
389 LOG_DEBUG("MDM: halt succeded after %d attempts.", tries
);
392 /* enable polling in case kinetis_check_flash_security_status disabled it */
393 jtag_poll_set_enabled(true);
397 target
->reset_halt
= true;
398 target
->type
->assert_reset(target
);
400 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, 0);
401 if (retval
!= ERROR_OK
) {
402 LOG_ERROR("MDM: failed to clear MDM_REG_CTRL");
406 target
->type
->deassert_reset(target
);
411 COMMAND_HANDLER(kinetis_mdm_reset
)
413 struct target
*target
= get_current_target(CMD_CTX
);
414 struct cortex_m_common
*cortex_m
= target_to_cm(target
);
415 struct adiv5_dap
*dap
= cortex_m
->armv7m
.arm
.dap
;
419 LOG_ERROR("Cannot perform reset with a high-level adapter");
423 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, MDM_CTRL_SYS_RES_REQ
);
424 if (retval
!= ERROR_OK
) {
425 LOG_ERROR("MDM: failed to write MDM_REG_CTRL");
429 retval
= kinetis_mdm_poll_register(dap
, MDM_REG_STAT
, MDM_STAT_SYSRES
, 0, 500);
430 if (retval
!= ERROR_OK
) {
431 LOG_ERROR("MDM: failed to assert reset");
435 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, 0);
436 if (retval
!= ERROR_OK
) {
437 LOG_ERROR("MDM: failed to clear MDM_REG_CTRL");
445 * This function implements the procedure to mass erase the flash via
446 * SWD/JTAG on Kinetis K and L series of devices as it is described in
447 * AN4835 "Production Flash Programming Best Practices for Kinetis K-
448 * and L-series MCUs" Section 4.2.1. To prevent a watchdog reset loop,
449 * the core remains halted after this function completes as suggested
450 * by the application note.
452 COMMAND_HANDLER(kinetis_mdm_mass_erase
)
454 struct target
*target
= get_current_target(CMD_CTX
);
455 struct cortex_m_common
*cortex_m
= target_to_cm(target
);
456 struct adiv5_dap
*dap
= cortex_m
->armv7m
.arm
.dap
;
459 LOG_ERROR("Cannot perform mass erase with a high-level adapter");
466 * ... Power on the processor, or if power has already been
467 * applied, assert the RESET pin to reset the processor. For
468 * devices that do not have a RESET pin, write the System
469 * Reset Request bit in the MDM-AP control register after
470 * establishing communication...
473 /* assert SRST if configured */
474 bool has_srst
= jtag_get_reset_config() & RESET_HAS_SRST
;
476 adapter_assert_reset();
478 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, MDM_CTRL_SYS_RES_REQ
);
479 if (retval
!= ERROR_OK
&& !has_srst
) {
480 LOG_ERROR("MDM: failed to assert reset");
481 goto deassert_reset_and_exit
;
485 * ... Read the MDM-AP status register repeatedly and wait for
486 * stable conditions suitable for mass erase:
487 * - mass erase is enabled
489 * - reset is finished
491 * Mass erase is started as soon as all conditions are met in 32
492 * subsequent status reads.
494 * In case of not stable conditions (RESET/WDOG loop in secured device)
495 * the user is asked for manual pressing of RESET button
498 int cnt_mass_erase_disabled
= 0;
500 int64_t ms_start
= timeval_ms();
501 bool man_reset_requested
= false;
505 int64_t ms_elapsed
= timeval_ms() - ms_start
;
507 if (!man_reset_requested
&& ms_elapsed
> 100) {
508 LOG_INFO("MDM: Press RESET button now if possible.");
509 man_reset_requested
= true;
512 if (ms_elapsed
> 3000) {
513 LOG_ERROR("MDM: waiting for mass erase conditions timed out.");
514 LOG_INFO("Mass erase of a secured MCU is not possible without hardware reset.");
515 LOG_INFO("Connect SRST, use 'reset_config srst_only' and retry.");
516 goto deassert_reset_and_exit
;
518 retval
= kinetis_mdm_read_register(dap
, MDM_REG_STAT
, &stat
);
519 if (retval
!= ERROR_OK
) {
524 if (!(stat
& MDM_STAT_FMEEN
)) {
526 cnt_mass_erase_disabled
++;
527 if (cnt_mass_erase_disabled
> 10) {
528 LOG_ERROR("MDM: mass erase is disabled");
529 goto deassert_reset_and_exit
;
534 if ((stat
& (MDM_STAT_FREADY
| MDM_STAT_SYSRES
)) == MDM_STAT_FREADY
)
539 } while (cnt_ready
< 32);
542 * ... Write the MDM-AP control register to set the Flash Mass
543 * Erase in Progress bit. This will start the mass erase
546 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, MDM_CTRL_SYS_RES_REQ
| MDM_CTRL_FMEIP
);
547 if (retval
!= ERROR_OK
) {
548 LOG_ERROR("MDM: failed to start mass erase");
549 goto deassert_reset_and_exit
;
553 * ... Read the MDM-AP control register until the Flash Mass
554 * Erase in Progress bit clears...
555 * Data sheed defines erase time <3.6 sec/512kB flash block.
556 * The biggest device has 4 pflash blocks => timeout 16 sec.
558 retval
= kinetis_mdm_poll_register(dap
, MDM_REG_CTRL
, MDM_CTRL_FMEIP
, 0, 16000);
559 if (retval
!= ERROR_OK
) {
560 LOG_ERROR("MDM: mass erase timeout");
561 goto deassert_reset_and_exit
;
565 /* enable polling in case kinetis_check_flash_security_status disabled it */
566 jtag_poll_set_enabled(true);
570 target
->reset_halt
= true;
571 target
->type
->assert_reset(target
);
574 * ... Negate the RESET signal or clear the System Reset Request
575 * bit in the MDM-AP control register.
577 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, 0);
578 if (retval
!= ERROR_OK
)
579 LOG_ERROR("MDM: failed to clear MDM_REG_CTRL");
581 target
->type
->deassert_reset(target
);
585 deassert_reset_and_exit
:
586 kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, 0);
588 adapter_deassert_reset();
592 static const uint32_t kinetis_known_mdm_ids
[] = {
593 0x001C0000, /* Kinetis-K Series */
594 0x001C0020, /* Kinetis-L/M/V/E Series */
598 * This function implements the procedure to connect to
599 * SWD/JTAG on Kinetis K and L series of devices as it is described in
600 * AN4835 "Production Flash Programming Best Practices for Kinetis K-
601 * and L-series MCUs" Section 4.1.1
603 COMMAND_HANDLER(kinetis_check_flash_security_status
)
605 struct target
*target
= get_current_target(CMD_CTX
);
606 struct cortex_m_common
*cortex_m
= target_to_cm(target
);
607 struct adiv5_dap
*dap
= cortex_m
->armv7m
.arm
.dap
;
610 LOG_WARNING("Cannot check flash security status with a high-level adapter");
615 return ERROR_OK
; /* too early to check, in JTAG mode ops may not be initialised */
621 * ... The MDM-AP ID register can be read to verify that the
622 * connection is working correctly...
624 retval
= kinetis_mdm_read_register(dap
, MDM_REG_ID
, &val
);
625 if (retval
!= ERROR_OK
) {
626 LOG_ERROR("MDM: failed to read ID register");
631 return ERROR_OK
; /* dap not yet initialised */
634 for (size_t i
= 0; i
< ARRAY_SIZE(kinetis_known_mdm_ids
); i
++) {
635 if (val
== kinetis_known_mdm_ids
[i
]) {
642 LOG_WARNING("MDM: unknown ID %08" PRIX32
, val
);
645 * ... Read the System Security bit to determine if security is enabled.
646 * If System Security = 0, then proceed. If System Security = 1, then
647 * communication with the internals of the processor, including the
648 * flash, will not be possible without issuing a mass erase command or
649 * unsecuring the part through other means (backdoor key unlock)...
651 retval
= kinetis_mdm_read_register(dap
, MDM_REG_STAT
, &val
);
652 if (retval
!= ERROR_OK
) {
653 LOG_ERROR("MDM: failed to read MDM_REG_STAT");
658 * System Security bit is also active for short time during reset.
659 * If a MCU has blank flash and runs in RESET/WDOG loop,
660 * System Security bit is active most of time!
661 * We should observe Flash Ready bit and read status several times
662 * to avoid false detection of secured MCU
664 int secured_score
= 0, flash_not_ready_score
= 0;
666 if ((val
& (MDM_STAT_SYSSEC
| MDM_STAT_FREADY
)) != MDM_STAT_FREADY
) {
670 for (i
= 0; i
< 32; i
++) {
671 stats
[i
] = MDM_STAT_FREADY
;
672 dap_queue_ap_read(dap_ap(dap
, MDM_AP
), MDM_REG_STAT
, &stats
[i
]);
674 retval
= dap_run(dap
);
675 if (retval
!= ERROR_OK
) {
676 LOG_DEBUG("MDM: dap_run failed when validating secured state");
679 for (i
= 0; i
< 32; i
++) {
680 if (stats
[i
] & MDM_STAT_SYSSEC
)
682 if (!(stats
[i
] & MDM_STAT_FREADY
))
683 flash_not_ready_score
++;
687 if (flash_not_ready_score
<= 8 && secured_score
> 24) {
688 jtag_poll_set_enabled(false);
690 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
691 LOG_WARNING("**** ****");
692 LOG_WARNING("**** Your Kinetis MCU is in secured state, which means that, ****");
693 LOG_WARNING("**** with exception for very basic communication, JTAG/SWD ****");
694 LOG_WARNING("**** interface will NOT work. In order to restore its ****");
695 LOG_WARNING("**** functionality please issue 'kinetis mdm mass_erase' ****");
696 LOG_WARNING("**** command, power cycle the MCU and restart OpenOCD. ****");
697 LOG_WARNING("**** ****");
698 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
700 } else if (flash_not_ready_score
> 24) {
701 jtag_poll_set_enabled(false);
702 LOG_WARNING("**** Your Kinetis MCU is probably locked-up in RESET/WDOG loop. ****");
703 LOG_WARNING("**** Common reason is a blank flash (at least a reset vector). ****");
704 LOG_WARNING("**** Issue 'kinetis mdm halt' command or if SRST is connected ****");
705 LOG_WARNING("**** and configured, use 'reset halt' ****");
706 LOG_WARNING("**** If MCU cannot be halted, it is likely secured and running ****");
707 LOG_WARNING("**** in RESET/WDOG loop. Issue 'kinetis mdm mass_erase' ****");
710 LOG_INFO("MDM: Chip is unsecured. Continuing.");
711 jtag_poll_set_enabled(true);
717 FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command
)
719 struct kinetis_flash_bank
*bank_info
;
722 return ERROR_COMMAND_SYNTAX_ERROR
;
724 LOG_INFO("add flash_bank kinetis %s", bank
->name
);
726 bank_info
= malloc(sizeof(struct kinetis_flash_bank
));
728 memset(bank_info
, 0, sizeof(struct kinetis_flash_bank
));
730 bank
->driver_priv
= bank_info
;
735 /* Disable the watchdog on Kinetis devices */
736 int kinetis_disable_wdog(struct target
*target
, uint32_t sim_sdid
)
738 struct working_area
*wdog_algorithm
;
739 struct armv7m_algorithm armv7m_info
;
743 static const uint8_t kinetis_unlock_wdog_code
[] = {
744 #include "../../../contrib/loaders/watchdog/armv7m_kinetis_wdog.inc"
747 /* Decide whether the connected device needs watchdog disabling.
748 * Disable for all Kx and KVx devices, return if it is a KLx */
750 if ((sim_sdid
& KINETIS_SDID_SERIESID_MASK
) == KINETIS_SDID_SERIESID_KL
)
753 /* The connected device requires watchdog disabling. */
754 retval
= target_read_u16(target
, WDOG_STCTRH
, &wdog
);
755 if (retval
!= ERROR_OK
)
758 if ((wdog
& 0x1) == 0) {
759 /* watchdog already disabled */
762 LOG_INFO("Disabling Kinetis watchdog (initial WDOG_STCTRLH = 0x%x)", wdog
);
764 if (target
->state
!= TARGET_HALTED
) {
765 LOG_ERROR("Target not halted");
766 return ERROR_TARGET_NOT_HALTED
;
769 retval
= target_alloc_working_area(target
, sizeof(kinetis_unlock_wdog_code
), &wdog_algorithm
);
770 if (retval
!= ERROR_OK
)
773 retval
= target_write_buffer(target
, wdog_algorithm
->address
,
774 sizeof(kinetis_unlock_wdog_code
), (uint8_t *)kinetis_unlock_wdog_code
);
775 if (retval
!= ERROR_OK
) {
776 target_free_working_area(target
, wdog_algorithm
);
780 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
781 armv7m_info
.core_mode
= ARM_MODE_THREAD
;
783 retval
= target_run_algorithm(target
, 0, NULL
, 0, NULL
, wdog_algorithm
->address
,
784 wdog_algorithm
->address
+ (sizeof(kinetis_unlock_wdog_code
) - 2),
785 10000, &armv7m_info
);
787 if (retval
!= ERROR_OK
)
788 LOG_ERROR("error executing kinetis wdog unlock algorithm");
790 retval
= target_read_u16(target
, WDOG_STCTRH
, &wdog
);
791 if (retval
!= ERROR_OK
)
793 LOG_INFO("WDOG_STCTRLH = 0x%x", wdog
);
795 target_free_working_area(target
, wdog_algorithm
);
800 COMMAND_HANDLER(kinetis_disable_wdog_handler
)
804 struct target
*target
= get_current_target(CMD_CTX
);
807 return ERROR_COMMAND_SYNTAX_ERROR
;
809 result
= target_read_u32(target
, SIM_SDID
, &sim_sdid
);
810 if (result
!= ERROR_OK
) {
811 LOG_ERROR("Failed to read SIMSDID");
815 result
= kinetis_disable_wdog(target
, sim_sdid
);
820 static int kinetis_ftfx_decode_error(uint8_t fstat
)
823 LOG_ERROR("Flash operation failed, illegal command");
824 return ERROR_FLASH_OPER_UNSUPPORTED
;
826 } else if (fstat
& 0x10)
827 LOG_ERROR("Flash operation failed, protection violated");
829 else if (fstat
& 0x40)
830 LOG_ERROR("Flash operation failed, read collision");
832 else if (fstat
& 0x80)
836 LOG_ERROR("Flash operation timed out");
838 return ERROR_FLASH_OPERATION_FAILED
;
842 static int kinetis_ftfx_prepare(struct target
*target
)
847 /* wait until busy */
848 for (i
= 0; i
< 50; i
++) {
849 result
= target_read_u8(target
, FTFx_FSTAT
, &fstat
);
850 if (result
!= ERROR_OK
)
857 if ((fstat
& 0x80) == 0) {
858 LOG_ERROR("Flash controller is busy");
859 return ERROR_FLASH_OPERATION_FAILED
;
862 /* reset error flags */
863 result
= target_write_u8(target
, FTFx_FSTAT
, 0x70);
868 /* Kinetis Program-LongWord Microcodes */
869 static const uint8_t kinetis_flash_write_code
[] = {
870 #include "../../../contrib/loaders/flash/kinetis/kinetis_flash.inc"
873 /* Program LongWord Block Write */
874 static int kinetis_write_block(struct flash_bank
*bank
, const uint8_t *buffer
,
875 uint32_t offset
, uint32_t wcount
)
877 struct target
*target
= bank
->target
;
878 uint32_t buffer_size
= 2048; /* Default minimum value */
879 struct working_area
*write_algorithm
;
880 struct working_area
*source
;
881 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
882 uint32_t address
= kinfo
->prog_base
+ offset
;
883 uint32_t end_address
;
884 struct reg_param reg_params
[5];
885 struct armv7m_algorithm armv7m_info
;
889 /* Increase buffer_size if needed */
890 if (buffer_size
< (target
->working_area_size
/2))
891 buffer_size
= (target
->working_area_size
/2);
893 /* allocate working area with flash programming code */
894 if (target_alloc_working_area(target
, sizeof(kinetis_flash_write_code
),
895 &write_algorithm
) != ERROR_OK
) {
896 LOG_WARNING("no working area available, can't do block memory writes");
897 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
900 retval
= target_write_buffer(target
, write_algorithm
->address
,
901 sizeof(kinetis_flash_write_code
), kinetis_flash_write_code
);
902 if (retval
!= ERROR_OK
)
906 while (target_alloc_working_area(target
, buffer_size
, &source
) != ERROR_OK
) {
908 if (buffer_size
<= 256) {
909 /* free working area, write algorithm already allocated */
910 target_free_working_area(target
, write_algorithm
);
912 LOG_WARNING("No large enough working area available, can't do block memory writes");
913 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
917 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
918 armv7m_info
.core_mode
= ARM_MODE_THREAD
;
920 init_reg_param(®_params
[0], "r0", 32, PARAM_IN_OUT
); /* address */
921 init_reg_param(®_params
[1], "r1", 32, PARAM_OUT
); /* word count */
922 init_reg_param(®_params
[2], "r2", 32, PARAM_OUT
);
923 init_reg_param(®_params
[3], "r3", 32, PARAM_OUT
);
924 init_reg_param(®_params
[4], "r4", 32, PARAM_OUT
);
926 buf_set_u32(reg_params
[0].value
, 0, 32, address
);
927 buf_set_u32(reg_params
[1].value
, 0, 32, wcount
);
928 buf_set_u32(reg_params
[2].value
, 0, 32, source
->address
);
929 buf_set_u32(reg_params
[3].value
, 0, 32, source
->address
+ source
->size
);
930 buf_set_u32(reg_params
[4].value
, 0, 32, FTFx_FSTAT
);
932 retval
= target_run_flash_async_algorithm(target
, buffer
, wcount
, 4,
935 source
->address
, source
->size
,
936 write_algorithm
->address
, 0,
939 if (retval
== ERROR_FLASH_OPERATION_FAILED
) {
940 end_address
= buf_get_u32(reg_params
[0].value
, 0, 32);
942 LOG_ERROR("Error writing flash at %08" PRIx32
, end_address
);
944 retval
= target_read_u8(target
, FTFx_FSTAT
, &fstat
);
945 if (retval
== ERROR_OK
) {
946 retval
= kinetis_ftfx_decode_error(fstat
);
948 /* reset error flags */
949 target_write_u8(target
, FTFx_FSTAT
, 0x70);
951 } else if (retval
!= ERROR_OK
)
952 LOG_ERROR("Error executing kinetis Flash programming algorithm");
954 target_free_working_area(target
, source
);
955 target_free_working_area(target
, write_algorithm
);
957 destroy_reg_param(®_params
[0]);
958 destroy_reg_param(®_params
[1]);
959 destroy_reg_param(®_params
[2]);
960 destroy_reg_param(®_params
[3]);
961 destroy_reg_param(®_params
[4]);
966 static int kinetis_protect(struct flash_bank
*bank
, int set
, int first
, int last
)
970 if (allow_fcf_writes
) {
971 LOG_ERROR("Protection setting is possible with 'kinetis fcf_source protection' only!");
975 if (!bank
->prot_blocks
|| bank
->num_prot_blocks
== 0) {
976 LOG_ERROR("No protection possible for current bank!");
977 return ERROR_FLASH_BANK_INVALID
;
980 for (i
= first
; i
< bank
->num_prot_blocks
&& i
<= last
; i
++)
981 bank
->prot_blocks
[i
].is_protected
= set
;
983 LOG_INFO("Protection bits will be written at the next FCF sector erase or write.");
984 LOG_INFO("Do not issue 'flash info' command until protection is written,");
985 LOG_INFO("doing so would re-read protection status from MCU.");
990 static int kinetis_protect_check(struct flash_bank
*bank
)
992 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
997 if (kinfo
->flash_class
== FC_PFLASH
) {
999 /* read protection register */
1000 result
= target_read_u32(bank
->target
, FTFx_FPROT3
, &fprot
);
1001 if (result
!= ERROR_OK
)
1004 /* Every bit protects 1/32 of the full flash (not necessarily just this bank) */
1006 } else if (kinfo
->flash_class
== FC_FLEX_NVM
) {
1009 /* read protection register */
1010 result
= target_read_u8(bank
->target
, FTFx_FDPROT
, &fdprot
);
1011 if (result
!= ERROR_OK
)
1017 LOG_ERROR("Protection checks for FlexRAM not supported");
1018 return ERROR_FLASH_BANK_INVALID
;
1021 b
= kinfo
->protection_block
;
1022 for (i
= 0; i
< bank
->num_prot_blocks
; i
++) {
1023 if ((fprot
>> b
) & 1)
1024 bank
->prot_blocks
[i
].is_protected
= 0;
1026 bank
->prot_blocks
[i
].is_protected
= 1;
1035 static int kinetis_fill_fcf(struct flash_bank
*bank
, uint8_t *fcf
)
1037 uint32_t fprot
= 0xffffffff;
1038 uint8_t fsec
= 0xfe; /* set MCU unsecure */
1039 uint8_t fdprot
= 0xff;
1041 uint32_t pflash_bit
;
1043 struct flash_bank
*bank_iter
;
1044 struct kinetis_flash_bank
*kinfo
;
1046 memset(fcf
, 0xff, FCF_SIZE
);
1051 /* iterate over all kinetis banks */
1052 /* current bank is bank 0, it contains FCF */
1053 for (bank_iter
= bank
; bank_iter
; bank_iter
= bank_iter
->next
) {
1054 if (bank_iter
->driver
!= &kinetis_flash
1055 || bank_iter
->target
!= bank
->target
)
1058 kinetis_auto_probe(bank_iter
);
1060 kinfo
= bank
->driver_priv
;
1064 if (kinfo
->flash_class
== FC_PFLASH
) {
1065 for (i
= 0; i
< bank_iter
->num_prot_blocks
; i
++) {
1066 if (bank_iter
->prot_blocks
[i
].is_protected
== 1)
1067 fprot
&= ~pflash_bit
;
1072 } else if (kinfo
->flash_class
== FC_FLEX_NVM
) {
1073 for (i
= 0; i
< bank_iter
->num_prot_blocks
; i
++) {
1074 if (bank_iter
->prot_blocks
[i
].is_protected
== 1)
1075 fdprot
&= ~dflash_bit
;
1083 target_buffer_set_u32(bank
->target
, fcf
+ FCF_FPROT
, fprot
);
1084 fcf
[FCF_FSEC
] = fsec
;
1085 fcf
[FCF_FOPT
] = fcf_fopt
;
1086 fcf
[FCF_FDPROT
] = fdprot
;
1090 static int kinetis_ftfx_command(struct target
*target
, uint8_t fcmd
, uint32_t faddr
,
1091 uint8_t fccob4
, uint8_t fccob5
, uint8_t fccob6
, uint8_t fccob7
,
1092 uint8_t fccob8
, uint8_t fccob9
, uint8_t fccoba
, uint8_t fccobb
,
1093 uint8_t *ftfx_fstat
)
1095 uint8_t command
[12] = {faddr
& 0xff, (faddr
>> 8) & 0xff, (faddr
>> 16) & 0xff, fcmd
,
1096 fccob7
, fccob6
, fccob5
, fccob4
,
1097 fccobb
, fccoba
, fccob9
, fccob8
};
1100 int64_t ms_timeout
= timeval_ms() + 250;
1102 result
= target_write_memory(target
, FTFx_FCCOB3
, 4, 3, command
);
1103 if (result
!= ERROR_OK
)
1107 result
= target_write_u8(target
, FTFx_FSTAT
, 0x80);
1108 if (result
!= ERROR_OK
)
1113 result
= target_read_u8(target
, FTFx_FSTAT
, &fstat
);
1115 if (result
!= ERROR_OK
)
1121 } while (timeval_ms() < ms_timeout
);
1124 *ftfx_fstat
= fstat
;
1126 if ((fstat
& 0xf0) != 0x80) {
1127 LOG_DEBUG("ftfx command failed FSTAT: %02X FCCOB: %02X%02X%02X%02X %02X%02X%02X%02X %02X%02X%02X%02X",
1128 fstat
, command
[3], command
[2], command
[1], command
[0],
1129 command
[7], command
[6], command
[5], command
[4],
1130 command
[11], command
[10], command
[9], command
[8]);
1132 return kinetis_ftfx_decode_error(fstat
);
1139 static int kinetis_check_run_mode(struct target
*target
)
1142 uint8_t pmctrl
, pmstat
;
1144 if (target
->state
!= TARGET_HALTED
) {
1145 LOG_ERROR("Target not halted");
1146 return ERROR_TARGET_NOT_HALTED
;
1149 result
= target_read_u8(target
, SMC_PMSTAT
, &pmstat
);
1150 if (result
!= ERROR_OK
)
1153 if (pmstat
== PM_STAT_RUN
)
1156 if (pmstat
== PM_STAT_VLPR
) {
1157 /* It is safe to switch from VLPR to RUN mode without changing clock */
1158 LOG_INFO("Switching from VLPR to RUN mode.");
1159 pmctrl
= PM_CTRL_RUNM_RUN
;
1160 result
= target_write_u8(target
, SMC_PMCTRL
, pmctrl
);
1161 if (result
!= ERROR_OK
)
1164 for (i
= 100; i
; i
--) {
1165 result
= target_read_u8(target
, SMC_PMSTAT
, &pmstat
);
1166 if (result
!= ERROR_OK
)
1169 if (pmstat
== PM_STAT_RUN
)
1174 LOG_ERROR("Flash operation not possible in current run mode: SMC_PMSTAT: 0x%x", pmstat
);
1175 LOG_ERROR("Issue a 'reset init' command.");
1176 return ERROR_TARGET_NOT_HALTED
;
1180 static void kinetis_invalidate_flash_cache(struct flash_bank
*bank
)
1182 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1184 if (kinfo
->flash_support
& FS_INVALIDATE_CACHE_K
)
1185 target_write_u8(bank
->target
, FMC_PFB01CR
+ 2, 0xf0);
1187 else if (kinfo
->flash_support
& FS_INVALIDATE_CACHE_L
)
1188 target_write_u8(bank
->target
, MCM_PLACR
+ 1, 0x04);
1194 static int kinetis_erase(struct flash_bank
*bank
, int first
, int last
)
1197 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1199 result
= kinetis_check_run_mode(bank
->target
);
1200 if (result
!= ERROR_OK
)
1203 /* reset error flags */
1204 result
= kinetis_ftfx_prepare(bank
->target
);
1205 if (result
!= ERROR_OK
)
1208 if ((first
> bank
->num_sectors
) || (last
> bank
->num_sectors
))
1209 return ERROR_FLASH_OPERATION_FAILED
;
1212 * FIXME: TODO: use the 'Erase Flash Block' command if the
1213 * requested erase is PFlash or NVM and encompasses the entire
1214 * block. Should be quicker.
1216 for (i
= first
; i
<= last
; i
++) {
1217 /* set command and sector address */
1218 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_SECTERASE
, kinfo
->prog_base
+ bank
->sectors
[i
].offset
,
1219 0, 0, 0, 0, 0, 0, 0, 0, NULL
);
1221 if (result
!= ERROR_OK
) {
1222 LOG_WARNING("erase sector %d failed", i
);
1223 return ERROR_FLASH_OPERATION_FAILED
;
1226 bank
->sectors
[i
].is_erased
= 1;
1229 && bank
->sectors
[i
].offset
<= FCF_ADDRESS
1230 && bank
->sectors
[i
].offset
+ bank
->sectors
[i
].size
> FCF_ADDRESS
+ FCF_SIZE
) {
1231 if (allow_fcf_writes
) {
1232 LOG_WARNING("Flash Configuration Field erased, DO NOT reset or power off the device");
1233 LOG_WARNING("until correct FCF is programmed or MCU gets security lock.");
1235 uint8_t fcf_buffer
[FCF_SIZE
];
1237 kinetis_fill_fcf(bank
, fcf_buffer
);
1238 result
= kinetis_write_inner(bank
, fcf_buffer
, FCF_ADDRESS
, FCF_SIZE
);
1239 if (result
!= ERROR_OK
)
1240 LOG_WARNING("Flash Configuration Field write failed");
1241 bank
->sectors
[i
].is_erased
= 0;
1246 kinetis_invalidate_flash_cache(bank
);
1251 static int kinetis_make_ram_ready(struct target
*target
)
1256 /* check if ram ready */
1257 result
= target_read_u8(target
, FTFx_FCNFG
, &ftfx_fcnfg
);
1258 if (result
!= ERROR_OK
)
1261 if (ftfx_fcnfg
& (1 << 1))
1262 return ERROR_OK
; /* ram ready */
1264 /* make flex ram available */
1265 result
= kinetis_ftfx_command(target
, FTFx_CMD_SETFLEXRAM
, 0x00ff0000,
1266 0, 0, 0, 0, 0, 0, 0, 0, NULL
);
1267 if (result
!= ERROR_OK
)
1268 return ERROR_FLASH_OPERATION_FAILED
;
1271 result
= target_read_u8(target
, FTFx_FCNFG
, &ftfx_fcnfg
);
1272 if (result
!= ERROR_OK
)
1275 if (ftfx_fcnfg
& (1 << 1))
1276 return ERROR_OK
; /* ram ready */
1278 return ERROR_FLASH_OPERATION_FAILED
;
1282 static int kinetis_write_sections(struct flash_bank
*bank
, const uint8_t *buffer
,
1283 uint32_t offset
, uint32_t count
)
1285 int result
= ERROR_OK
;
1286 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1287 uint8_t *buffer_aligned
= NULL
;
1289 * Kinetis uses different terms for the granularity of
1290 * sector writes, e.g. "phrase" or "128 bits". We use
1291 * the generic term "chunk". The largest possible
1292 * Kinetis "chunk" is 16 bytes (128 bits).
1294 uint32_t prog_section_chunk_bytes
= kinfo
->sector_size
>> 8;
1295 uint32_t prog_size_bytes
= kinfo
->max_flash_prog_size
;
1298 uint32_t size
= prog_size_bytes
- offset
% prog_size_bytes
;
1299 uint32_t align_begin
= offset
% prog_section_chunk_bytes
;
1301 uint32_t size_aligned
;
1302 uint16_t chunk_count
;
1308 align_end
= (align_begin
+ size
) % prog_section_chunk_bytes
;
1310 align_end
= prog_section_chunk_bytes
- align_end
;
1312 size_aligned
= align_begin
+ size
+ align_end
;
1313 chunk_count
= size_aligned
/ prog_section_chunk_bytes
;
1315 if (size
!= size_aligned
) {
1316 /* aligned section: the first, the last or the only */
1317 if (!buffer_aligned
)
1318 buffer_aligned
= malloc(prog_size_bytes
);
1320 memset(buffer_aligned
, 0xff, size_aligned
);
1321 memcpy(buffer_aligned
+ align_begin
, buffer
, size
);
1323 result
= target_write_memory(bank
->target
, FLEXRAM
,
1324 4, size_aligned
/ 4, buffer_aligned
);
1326 LOG_DEBUG("section @ %08" PRIx32
" aligned begin %" PRIu32
", end %" PRIu32
,
1327 bank
->base
+ offset
, align_begin
, align_end
);
1329 result
= target_write_memory(bank
->target
, FLEXRAM
,
1330 4, size_aligned
/ 4, buffer
);
1332 LOG_DEBUG("write section @ %08" PRIx32
" with length %" PRIu32
" bytes",
1333 bank
->base
+ offset
, size
);
1335 if (result
!= ERROR_OK
) {
1336 LOG_ERROR("target_write_memory failed");
1340 /* execute section-write command */
1341 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_SECTWRITE
,
1342 kinfo
->prog_base
+ offset
- align_begin
,
1343 chunk_count
>>8, chunk_count
, 0, 0,
1344 0, 0, 0, 0, &ftfx_fstat
);
1346 if (result
!= ERROR_OK
) {
1347 LOG_ERROR("Error writing section at %08" PRIx32
, bank
->base
+ offset
);
1351 if (ftfx_fstat
& 0x01)
1352 LOG_ERROR("Flash write error at %08" PRIx32
, bank
->base
+ offset
);
1359 free(buffer_aligned
);
1364 static int kinetis_write_inner(struct flash_bank
*bank
, const uint8_t *buffer
,
1365 uint32_t offset
, uint32_t count
)
1367 int result
, fallback
= 0;
1368 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1370 if (!(kinfo
->flash_support
& FS_PROGRAM_SECTOR
)) {
1371 /* fallback to longword write */
1373 LOG_WARNING("This device supports Program Longword execution only.");
1375 result
= kinetis_make_ram_ready(bank
->target
);
1376 if (result
!= ERROR_OK
) {
1378 LOG_WARNING("FlexRAM not ready, fallback to slow longword write.");
1382 LOG_DEBUG("flash write @08%" PRIx32
, bank
->base
+ offset
);
1384 if (fallback
== 0) {
1385 /* program section command */
1386 kinetis_write_sections(bank
, buffer
, offset
, count
);
1388 else if (kinfo
->flash_support
& FS_PROGRAM_LONGWORD
) {
1389 /* program longword command, not supported in FTFE */
1390 uint8_t *new_buffer
= NULL
;
1392 /* check word alignment */
1394 LOG_ERROR("offset 0x%" PRIx32
" breaks the required alignment", offset
);
1395 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
1399 uint32_t old_count
= count
;
1400 count
= (old_count
| 3) + 1;
1401 new_buffer
= malloc(count
);
1402 if (new_buffer
== NULL
) {
1403 LOG_ERROR("odd number of bytes to write and no memory "
1404 "for padding buffer");
1407 LOG_INFO("odd number of bytes to write (%" PRIu32
"), extending to %" PRIu32
" "
1408 "and padding with 0xff", old_count
, count
);
1409 memset(new_buffer
+ old_count
, 0xff, count
- old_count
);
1410 buffer
= memcpy(new_buffer
, buffer
, old_count
);
1413 uint32_t words_remaining
= count
/ 4;
1415 kinetis_disable_wdog(bank
->target
, kinfo
->sim_sdid
);
1417 /* try using a block write */
1418 result
= kinetis_write_block(bank
, buffer
, offset
, words_remaining
);
1420 if (result
== ERROR_TARGET_RESOURCE_NOT_AVAILABLE
) {
1421 /* if block write failed (no sufficient working area),
1422 * we use normal (slow) single word accesses */
1423 LOG_WARNING("couldn't use block writes, falling back to single "
1426 while (words_remaining
) {
1429 LOG_DEBUG("write longword @ %08" PRIx32
, (uint32_t)(bank
->base
+ offset
));
1431 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_LWORDPROG
, kinfo
->prog_base
+ offset
,
1432 buffer
[3], buffer
[2], buffer
[1], buffer
[0],
1433 0, 0, 0, 0, &ftfx_fstat
);
1435 if (result
!= ERROR_OK
) {
1436 LOG_ERROR("Error writing longword at %08" PRIx32
, bank
->base
+ offset
);
1440 if (ftfx_fstat
& 0x01)
1441 LOG_ERROR("Flash write error at %08" PRIx32
, bank
->base
+ offset
);
1450 LOG_ERROR("Flash write strategy not implemented");
1451 return ERROR_FLASH_OPERATION_FAILED
;
1454 kinetis_invalidate_flash_cache(bank
);
1459 static int kinetis_write(struct flash_bank
*bank
, const uint8_t *buffer
,
1460 uint32_t offset
, uint32_t count
)
1463 bool set_fcf
= false;
1466 result
= kinetis_check_run_mode(bank
->target
);
1467 if (result
!= ERROR_OK
)
1470 /* reset error flags */
1471 result
= kinetis_ftfx_prepare(bank
->target
);
1472 if (result
!= ERROR_OK
)
1475 if (bank
->base
== 0 && !allow_fcf_writes
) {
1476 if (bank
->sectors
[1].offset
<= FCF_ADDRESS
)
1477 sect
= 1; /* 1kb sector, FCF in 2nd sector */
1479 if (offset
< bank
->sectors
[sect
].offset
+ bank
->sectors
[sect
].size
1480 && offset
+ count
> bank
->sectors
[sect
].offset
)
1481 set_fcf
= true; /* write to any part of sector with FCF */
1485 uint8_t fcf_buffer
[FCF_SIZE
];
1486 uint8_t fcf_current
[FCF_SIZE
];
1488 kinetis_fill_fcf(bank
, fcf_buffer
);
1490 if (offset
< FCF_ADDRESS
) {
1491 /* write part preceding FCF */
1492 result
= kinetis_write_inner(bank
, buffer
, offset
, FCF_ADDRESS
- offset
);
1493 if (result
!= ERROR_OK
)
1497 result
= target_read_memory(bank
->target
, FCF_ADDRESS
, 4, FCF_SIZE
/ 4, fcf_current
);
1498 if (result
== ERROR_OK
&& memcmp(fcf_current
, fcf_buffer
, FCF_SIZE
) == 0)
1502 /* write FCF if differs from flash - eliminate multiple writes */
1503 result
= kinetis_write_inner(bank
, fcf_buffer
, FCF_ADDRESS
, FCF_SIZE
);
1504 if (result
!= ERROR_OK
)
1508 LOG_WARNING("Flash Configuration Field written.");
1509 LOG_WARNING("Reset or power off the device to make settings effective.");
1511 if (offset
+ count
> FCF_ADDRESS
+ FCF_SIZE
) {
1512 uint32_t delta
= FCF_ADDRESS
+ FCF_SIZE
- offset
;
1513 /* write part after FCF */
1514 result
= kinetis_write_inner(bank
, buffer
+ delta
, FCF_ADDRESS
+ FCF_SIZE
, count
- delta
);
1519 /* no FCF fiddling, normal write */
1520 return kinetis_write_inner(bank
, buffer
, offset
, count
);
1524 static int kinetis_probe(struct flash_bank
*bank
)
1527 uint8_t fcfg1_nvmsize
, fcfg1_pfsize
, fcfg1_eesize
, fcfg1_depart
;
1528 uint8_t fcfg2_maxaddr0
, fcfg2_pflsh
, fcfg2_maxaddr1
;
1529 uint32_t nvm_size
= 0, pf_size
= 0, df_size
= 0, ee_size
= 0;
1530 unsigned num_blocks
= 0, num_pflash_blocks
= 0, num_nvm_blocks
= 0, first_nvm_bank
= 0,
1531 pflash_sector_size_bytes
= 0, nvm_sector_size_bytes
= 0;
1532 struct target
*target
= bank
->target
;
1533 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1535 kinfo
->probed
= false;
1537 result
= target_read_u32(target
, SIM_SDID
, &kinfo
->sim_sdid
);
1538 if (result
!= ERROR_OK
)
1541 if ((kinfo
->sim_sdid
& (~KINETIS_SDID_K_SERIES_MASK
)) == 0) {
1542 /* older K-series MCU */
1543 uint32_t mcu_type
= kinfo
->sim_sdid
& KINETIS_K_SDID_TYPE_MASK
;
1546 case KINETIS_K_SDID_K10_M50
:
1547 case KINETIS_K_SDID_K20_M50
:
1549 pflash_sector_size_bytes
= 1<<10;
1550 nvm_sector_size_bytes
= 1<<10;
1552 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1554 case KINETIS_K_SDID_K10_M72
:
1555 case KINETIS_K_SDID_K20_M72
:
1556 case KINETIS_K_SDID_K30_M72
:
1557 case KINETIS_K_SDID_K30_M100
:
1558 case KINETIS_K_SDID_K40_M72
:
1559 case KINETIS_K_SDID_K40_M100
:
1560 case KINETIS_K_SDID_K50_M72
:
1561 /* 2kB sectors, 1kB FlexNVM sectors */
1562 pflash_sector_size_bytes
= 2<<10;
1563 nvm_sector_size_bytes
= 1<<10;
1565 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1566 kinfo
->max_flash_prog_size
= 1<<10;
1568 case KINETIS_K_SDID_K10_M100
:
1569 case KINETIS_K_SDID_K20_M100
:
1570 case KINETIS_K_SDID_K11
:
1571 case KINETIS_K_SDID_K12
:
1572 case KINETIS_K_SDID_K21_M50
:
1573 case KINETIS_K_SDID_K22_M50
:
1574 case KINETIS_K_SDID_K51_M72
:
1575 case KINETIS_K_SDID_K53
:
1576 case KINETIS_K_SDID_K60_M100
:
1578 pflash_sector_size_bytes
= 2<<10;
1579 nvm_sector_size_bytes
= 2<<10;
1581 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1583 case KINETIS_K_SDID_K21_M120
:
1584 case KINETIS_K_SDID_K22_M120
:
1585 /* 4kB sectors (MK21FN1M0, MK21FX512, MK22FN1M0, MK22FX512) */
1586 pflash_sector_size_bytes
= 4<<10;
1587 kinfo
->max_flash_prog_size
= 1<<10;
1588 nvm_sector_size_bytes
= 4<<10;
1590 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1592 case KINETIS_K_SDID_K10_M120
:
1593 case KINETIS_K_SDID_K20_M120
:
1594 case KINETIS_K_SDID_K60_M150
:
1595 case KINETIS_K_SDID_K70_M150
:
1597 pflash_sector_size_bytes
= 4<<10;
1598 nvm_sector_size_bytes
= 4<<10;
1600 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1603 LOG_ERROR("Unsupported K-family FAMID");
1606 /* Newer K-series or KL series MCU */
1607 switch (kinfo
->sim_sdid
& KINETIS_SDID_SERIESID_MASK
) {
1608 case KINETIS_SDID_SERIESID_K
:
1609 switch (kinfo
->sim_sdid
& (KINETIS_SDID_FAMILYID_MASK
| KINETIS_SDID_SUBFAMID_MASK
)) {
1610 case KINETIS_SDID_FAMILYID_K0X
| KINETIS_SDID_SUBFAMID_KX2
:
1611 /* K02FN64, K02FN128: FTFA, 2kB sectors */
1612 pflash_sector_size_bytes
= 2<<10;
1614 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_K
;
1617 case KINETIS_SDID_FAMILYID_K2X
| KINETIS_SDID_SUBFAMID_KX2
: {
1618 /* MK24FN1M reports as K22, this should detect it (according to errata note 1N83J) */
1620 result
= target_read_u32(target
, SIM_SOPT1
, &sopt1
);
1621 if (result
!= ERROR_OK
)
1624 if (((kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K24FN1M
) &&
1625 ((sopt1
& KINETIS_SOPT1_RAMSIZE_MASK
) == KINETIS_SOPT1_RAMSIZE_K24FN1M
)) {
1627 pflash_sector_size_bytes
= 4<<10;
1629 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1630 kinfo
->max_flash_prog_size
= 1<<10;
1633 if ((kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K22FN128
1634 || (kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K22FN256
1635 || (kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K22FN512
) {
1636 /* K22 with new-style SDID - smaller pflash with FTFA, 2kB sectors */
1637 pflash_sector_size_bytes
= 2<<10;
1638 /* autodetect 1 or 2 blocks */
1639 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_K
;
1642 LOG_ERROR("Unsupported Kinetis K22 DIEID");
1645 case KINETIS_SDID_FAMILYID_K2X
| KINETIS_SDID_SUBFAMID_KX4
:
1646 pflash_sector_size_bytes
= 4<<10;
1647 if ((kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K24FN256
) {
1648 /* K24FN256 - smaller pflash with FTFA */
1650 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_K
;
1653 /* K24FN1M without errata 7534 */
1655 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1656 kinfo
->max_flash_prog_size
= 1<<10;
1659 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX3
:
1660 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX1
: /* errata 7534 - should be K63 */
1662 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX4
:
1663 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX2
: /* errata 7534 - should be K64 */
1664 /* K64FN1M0, K64FX512 */
1665 pflash_sector_size_bytes
= 4<<10;
1666 nvm_sector_size_bytes
= 4<<10;
1667 kinfo
->max_flash_prog_size
= 1<<10;
1669 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1672 case KINETIS_SDID_FAMILYID_K2X
| KINETIS_SDID_SUBFAMID_KX6
:
1674 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX6
:
1675 /* K66FN2M0, K66FX1M0 */
1676 pflash_sector_size_bytes
= 4<<10;
1677 nvm_sector_size_bytes
= 4<<10;
1678 kinfo
->max_flash_prog_size
= 1<<10;
1680 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1683 LOG_ERROR("Unsupported Kinetis FAMILYID SUBFAMID");
1687 case KINETIS_SDID_SERIESID_KL
:
1689 pflash_sector_size_bytes
= 1<<10;
1690 nvm_sector_size_bytes
= 1<<10;
1691 /* autodetect 1 or 2 blocks */
1692 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_L
;
1695 case KINETIS_SDID_SERIESID_KV
:
1697 switch (kinfo
->sim_sdid
& (KINETIS_SDID_FAMILYID_MASK
| KINETIS_SDID_SUBFAMID_MASK
)) {
1698 case KINETIS_SDID_FAMILYID_K1X
| KINETIS_SDID_SUBFAMID_KX0
:
1699 /* KV10: FTFA, 1kB sectors */
1700 pflash_sector_size_bytes
= 1<<10;
1702 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_L
;
1705 case KINETIS_SDID_FAMILYID_K1X
| KINETIS_SDID_SUBFAMID_KX1
:
1706 /* KV11: FTFA, 2kB sectors */
1707 pflash_sector_size_bytes
= 2<<10;
1709 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_L
;
1712 case KINETIS_SDID_FAMILYID_K3X
| KINETIS_SDID_SUBFAMID_KX0
:
1713 /* KV30: FTFA, 2kB sectors, 1 block */
1714 case KINETIS_SDID_FAMILYID_K3X
| KINETIS_SDID_SUBFAMID_KX1
:
1715 /* KV31: FTFA, 2kB sectors, 2 blocks */
1716 pflash_sector_size_bytes
= 2<<10;
1717 /* autodetect 1 or 2 blocks */
1718 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_K
;
1721 case KINETIS_SDID_FAMILYID_K4X
| KINETIS_SDID_SUBFAMID_KX2
:
1722 case KINETIS_SDID_FAMILYID_K4X
| KINETIS_SDID_SUBFAMID_KX4
:
1723 case KINETIS_SDID_FAMILYID_K4X
| KINETIS_SDID_SUBFAMID_KX6
:
1724 /* KV4x: FTFA, 4kB sectors */
1725 pflash_sector_size_bytes
= 4<<10;
1727 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_K
;
1731 LOG_ERROR("Unsupported KV FAMILYID SUBFAMID");
1736 LOG_ERROR("Unsupported K-series");
1740 if (pflash_sector_size_bytes
== 0) {
1741 LOG_ERROR("MCU is unsupported, SDID 0x%08" PRIx32
, kinfo
->sim_sdid
);
1742 return ERROR_FLASH_OPER_UNSUPPORTED
;
1745 result
= target_read_u32(target
, SIM_FCFG1
, &kinfo
->sim_fcfg1
);
1746 if (result
!= ERROR_OK
)
1749 result
= target_read_u32(target
, SIM_FCFG2
, &kinfo
->sim_fcfg2
);
1750 if (result
!= ERROR_OK
)
1753 LOG_DEBUG("SDID: 0x%08" PRIX32
" FCFG1: 0x%08" PRIX32
" FCFG2: 0x%08" PRIX32
, kinfo
->sim_sdid
,
1754 kinfo
->sim_fcfg1
, kinfo
->sim_fcfg2
);
1756 fcfg1_nvmsize
= (uint8_t)((kinfo
->sim_fcfg1
>> 28) & 0x0f);
1757 fcfg1_pfsize
= (uint8_t)((kinfo
->sim_fcfg1
>> 24) & 0x0f);
1758 fcfg1_eesize
= (uint8_t)((kinfo
->sim_fcfg1
>> 16) & 0x0f);
1759 fcfg1_depart
= (uint8_t)((kinfo
->sim_fcfg1
>> 8) & 0x0f);
1761 fcfg2_pflsh
= (uint8_t)((kinfo
->sim_fcfg2
>> 23) & 0x01);
1762 fcfg2_maxaddr0
= (uint8_t)((kinfo
->sim_fcfg2
>> 24) & 0x7f);
1763 fcfg2_maxaddr1
= (uint8_t)((kinfo
->sim_fcfg2
>> 16) & 0x7f);
1765 if (num_blocks
== 0)
1766 num_blocks
= fcfg2_maxaddr1
? 2 : 1;
1767 else if (fcfg2_maxaddr1
== 0 && num_blocks
>= 2) {
1769 LOG_WARNING("MAXADDR1 is zero, number of flash banks adjusted to 1");
1770 } else if (fcfg2_maxaddr1
!= 0 && num_blocks
== 1) {
1772 LOG_WARNING("MAXADDR1 is non zero, number of flash banks adjusted to 2");
1775 /* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */
1777 switch (fcfg1_nvmsize
) {
1783 nvm_size
= 1 << (14 + (fcfg1_nvmsize
>> 1));
1786 if (pflash_sector_size_bytes
>= 4<<10)
1797 switch (fcfg1_eesize
) {
1808 ee_size
= (16 << (10 - fcfg1_eesize
));
1815 switch (fcfg1_depart
) {
1822 df_size
= nvm_size
- (4096 << fcfg1_depart
);
1832 df_size
= 4096 << (fcfg1_depart
& 0x7);
1840 switch (fcfg1_pfsize
) {
1847 pf_size
= 1 << (14 + (fcfg1_pfsize
>> 1));
1850 /* a peculiar case: Freescale states different sizes for 0xf
1851 * K02P64M100SFARM 128 KB ... duplicate of code 0x7
1852 * K22P121M120SF8RM 256 KB ... duplicate of code 0x9
1853 * K22P121M120SF7RM 512 KB ... duplicate of code 0xb
1854 * K22P100M120SF5RM 1024 KB ... duplicate of code 0xd
1855 * K26P169M180SF5RM 2048 KB ... the only unique value
1856 * fcfg2_maxaddr0 seems to be the only clue to pf_size
1857 * Checking fcfg2_maxaddr0 later in this routine is pointless then
1860 pf_size
= ((uint32_t)fcfg2_maxaddr0
<< 13) * num_blocks
;
1862 pf_size
= ((uint32_t)fcfg2_maxaddr0
<< 13) * num_blocks
/ 2;
1863 if (pf_size
!= 2048<<10)
1864 LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %u KB", pf_size
>>10);
1872 LOG_DEBUG("FlexNVM: %" PRIu32
" PFlash: %" PRIu32
" FlexRAM: %" PRIu32
" PFLSH: %d",
1873 nvm_size
, pf_size
, ee_size
, fcfg2_pflsh
);
1875 num_pflash_blocks
= num_blocks
/ (2 - fcfg2_pflsh
);
1876 first_nvm_bank
= num_pflash_blocks
;
1877 num_nvm_blocks
= num_blocks
- num_pflash_blocks
;
1879 LOG_DEBUG("%d blocks total: %d PFlash, %d FlexNVM",
1880 num_blocks
, num_pflash_blocks
, num_nvm_blocks
);
1882 LOG_INFO("Probing flash info for bank %d", bank
->bank_number
);
1884 if ((unsigned)bank
->bank_number
< num_pflash_blocks
) {
1885 /* pflash, banks start at address zero */
1886 kinfo
->flash_class
= FC_PFLASH
;
1887 bank
->size
= (pf_size
/ num_pflash_blocks
);
1888 bank
->base
= 0x00000000 + bank
->size
* bank
->bank_number
;
1889 kinfo
->prog_base
= bank
->base
;
1890 kinfo
->sector_size
= pflash_sector_size_bytes
;
1891 /* pflash is divided into 32 protection areas for
1892 * parts with more than 32K of PFlash. For parts with
1893 * less the protection unit is set to 1024 bytes */
1894 kinfo
->protection_size
= MAX(pf_size
/ 32, 1024);
1895 bank
->num_prot_blocks
= 32 / num_pflash_blocks
;
1896 kinfo
->protection_block
= bank
->num_prot_blocks
* bank
->bank_number
;
1898 } else if ((unsigned)bank
->bank_number
< num_blocks
) {
1899 /* nvm, banks start at address 0x10000000 */
1900 unsigned nvm_ord
= bank
->bank_number
- first_nvm_bank
;
1903 kinfo
->flash_class
= FC_FLEX_NVM
;
1904 bank
->size
= (nvm_size
/ num_nvm_blocks
);
1905 bank
->base
= 0x10000000 + bank
->size
* nvm_ord
;
1906 kinfo
->prog_base
= 0x00800000 + bank
->size
* nvm_ord
;
1907 kinfo
->sector_size
= nvm_sector_size_bytes
;
1909 kinfo
->protection_size
= 0;
1911 for (i
= df_size
; ~i
& 1; i
>>= 1)
1914 kinfo
->protection_size
= df_size
/ 8; /* data flash size = 2^^n */
1916 kinfo
->protection_size
= nvm_size
/ 8; /* TODO: verify on SF1, not documented in RM */
1918 bank
->num_prot_blocks
= 8 / num_nvm_blocks
;
1919 kinfo
->protection_block
= bank
->num_prot_blocks
* nvm_ord
;
1921 /* EEPROM backup part of FlexNVM is not accessible, use df_size as a limit */
1922 if (df_size
> bank
->size
* nvm_ord
)
1923 limit
= df_size
- bank
->size
* nvm_ord
;
1927 if (bank
->size
> limit
) {
1929 LOG_DEBUG("FlexNVM bank %d limited to 0x%08" PRIx32
" due to active EEPROM backup",
1930 bank
->bank_number
, limit
);
1933 } else if ((unsigned)bank
->bank_number
== num_blocks
) {
1934 LOG_ERROR("FlexRAM support not yet implemented");
1935 return ERROR_FLASH_OPER_UNSUPPORTED
;
1937 LOG_ERROR("Cannot determine parameters for bank %d, only %d banks on device",
1938 bank
->bank_number
, num_blocks
);
1939 return ERROR_FLASH_BANK_INVALID
;
1942 if (bank
->bank_number
== 0 && ((uint32_t)fcfg2_maxaddr0
<< 13) != bank
->size
)
1943 LOG_WARNING("MAXADDR0 0x%02" PRIx8
" check failed,"
1944 " please report to OpenOCD mailing list", fcfg2_maxaddr0
);
1946 if (bank
->bank_number
== 1 && ((uint32_t)fcfg2_maxaddr1
<< 13) != bank
->size
)
1947 LOG_WARNING("MAXADDR1 0x%02" PRIx8
" check failed,"
1948 " please report to OpenOCD mailing list", fcfg2_maxaddr1
);
1950 if ((unsigned)bank
->bank_number
== first_nvm_bank
1951 && ((uint32_t)fcfg2_maxaddr1
<< 13) != df_size
)
1952 LOG_WARNING("FlexNVM MAXADDR1 0x%02" PRIx8
" check failed,"
1953 " please report to OpenOCD mailing list", fcfg2_maxaddr1
);
1956 if (bank
->sectors
) {
1957 free(bank
->sectors
);
1958 bank
->sectors
= NULL
;
1960 if (bank
->prot_blocks
) {
1961 free(bank
->prot_blocks
);
1962 bank
->prot_blocks
= NULL
;
1965 if (kinfo
->sector_size
== 0) {
1966 LOG_ERROR("Unknown sector size for bank %d", bank
->bank_number
);
1967 return ERROR_FLASH_BANK_INVALID
;
1970 if (kinfo
->flash_support
& FS_PROGRAM_SECTOR
1971 && kinfo
->max_flash_prog_size
== 0) {
1972 kinfo
->max_flash_prog_size
= kinfo
->sector_size
;
1973 /* Program section size is equal to sector size by default */
1976 bank
->num_sectors
= bank
->size
/ kinfo
->sector_size
;
1978 if (bank
->num_sectors
> 0) {
1979 /* FlexNVM bank can be used for EEPROM backup therefore zero sized */
1980 bank
->sectors
= alloc_block_array(0, kinfo
->sector_size
, bank
->num_sectors
);
1984 bank
->prot_blocks
= alloc_block_array(0, kinfo
->protection_size
, bank
->num_prot_blocks
);
1985 if (!bank
->prot_blocks
)
1989 bank
->num_prot_blocks
= 0;
1992 kinfo
->probed
= true;
1997 static int kinetis_auto_probe(struct flash_bank
*bank
)
1999 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
2001 if (kinfo
&& kinfo
->probed
)
2004 return kinetis_probe(bank
);
2007 static int kinetis_info(struct flash_bank
*bank
, char *buf
, int buf_size
)
2009 const char *bank_class_names
[] = {
2010 "(ANY)", "PFlash", "FlexNVM", "FlexRAM"
2013 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
2015 (void) snprintf(buf
, buf_size
,
2016 "%s driver for %s flash bank %s at 0x%8.8" PRIx32
"",
2017 bank
->driver
->name
, bank_class_names
[kinfo
->flash_class
],
2018 bank
->name
, bank
->base
);
2023 static int kinetis_blank_check(struct flash_bank
*bank
)
2025 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
2028 /* suprisingly blank check does not work in VLPR and HSRUN modes */
2029 result
= kinetis_check_run_mode(bank
->target
);
2030 if (result
!= ERROR_OK
)
2033 /* reset error flags */
2034 result
= kinetis_ftfx_prepare(bank
->target
);
2035 if (result
!= ERROR_OK
)
2038 if (kinfo
->flash_class
== FC_PFLASH
|| kinfo
->flash_class
== FC_FLEX_NVM
) {
2039 bool block_dirty
= false;
2042 if (kinfo
->flash_class
== FC_FLEX_NVM
) {
2043 uint8_t fcfg1_depart
= (uint8_t)((kinfo
->sim_fcfg1
>> 8) & 0x0f);
2044 /* block operation cannot be used on FlexNVM when EEPROM backup partition is set */
2045 if (fcfg1_depart
!= 0xf && fcfg1_depart
!= 0)
2050 /* check if whole bank is blank */
2051 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_BLOCKSTAT
, kinfo
->prog_base
,
2052 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat
);
2054 if (result
!= ERROR_OK
|| (ftfx_fstat
& 0x01))
2059 /* the whole bank is not erased, check sector-by-sector */
2061 for (i
= 0; i
< bank
->num_sectors
; i
++) {
2063 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_SECTSTAT
,
2064 kinfo
->prog_base
+ bank
->sectors
[i
].offset
,
2065 1, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat
);
2067 if (result
== ERROR_OK
) {
2068 bank
->sectors
[i
].is_erased
= !(ftfx_fstat
& 0x01);
2070 LOG_DEBUG("Ignoring errored PFlash sector blank-check");
2071 bank
->sectors
[i
].is_erased
= -1;
2075 /* the whole bank is erased, update all sectors */
2077 for (i
= 0; i
< bank
->num_sectors
; i
++)
2078 bank
->sectors
[i
].is_erased
= 1;
2081 LOG_WARNING("kinetis_blank_check not supported yet for FlexRAM");
2082 return ERROR_FLASH_OPERATION_FAILED
;
2089 COMMAND_HANDLER(kinetis_nvm_partition
)
2092 unsigned long par
, log2
= 0, ee1
= 0, ee2
= 0;
2093 enum { SHOW_INFO
, DF_SIZE
, EEBKP_SIZE
} sz_type
= SHOW_INFO
;
2095 uint8_t load_flex_ram
= 1;
2096 uint8_t ee_size_code
= 0x3f;
2097 uint8_t flex_nvm_partition_code
= 0;
2098 uint8_t ee_split
= 3;
2099 struct target
*target
= get_current_target(CMD_CTX
);
2100 struct flash_bank
*bank
;
2101 struct kinetis_flash_bank
*kinfo
;
2104 if (CMD_ARGC
>= 2) {
2105 if (strcmp(CMD_ARGV
[0], "dataflash") == 0)
2107 else if (strcmp(CMD_ARGV
[0], "eebkp") == 0)
2108 sz_type
= EEBKP_SIZE
;
2110 par
= strtoul(CMD_ARGV
[1], NULL
, 10);
2111 while (par
>> (log2
+ 3))
2116 result
= target_read_u32(target
, SIM_FCFG1
, &sim_fcfg1
);
2117 if (result
!= ERROR_OK
)
2120 flex_nvm_partition_code
= (uint8_t)((sim_fcfg1
>> 8) & 0x0f);
2121 switch (flex_nvm_partition_code
) {
2123 command_print(CMD_CTX
, "No EEPROM backup, data flash only");
2131 command_print(CMD_CTX
, "EEPROM backup %d KB", 4 << flex_nvm_partition_code
);
2134 command_print(CMD_CTX
, "No data flash, EEPROM backup only");
2142 command_print(CMD_CTX
, "data flash %d KB", 4 << (flex_nvm_partition_code
& 7));
2145 command_print(CMD_CTX
, "No EEPROM backup, data flash only (DEPART not set)");
2148 command_print(CMD_CTX
, "Unsupported EEPROM backup size code 0x%02" PRIx8
, flex_nvm_partition_code
);
2153 flex_nvm_partition_code
= 0x8 | log2
;
2157 flex_nvm_partition_code
= log2
;
2162 ee1
= ee2
= strtoul(CMD_ARGV
[2], NULL
, 10) / 2;
2163 else if (CMD_ARGC
>= 4) {
2164 ee1
= strtoul(CMD_ARGV
[2], NULL
, 10);
2165 ee2
= strtoul(CMD_ARGV
[3], NULL
, 10);
2168 enable
= ee1
+ ee2
> 0;
2170 for (log2
= 2; ; log2
++) {
2171 if (ee1
+ ee2
== (16u << 10) >> log2
)
2173 if (ee1
+ ee2
> (16u << 10) >> log2
|| log2
>= 9) {
2174 LOG_ERROR("Unsupported EEPROM size");
2175 return ERROR_FLASH_OPERATION_FAILED
;
2181 else if (ee1
* 7 == ee2
)
2183 else if (ee1
!= ee2
) {
2184 LOG_ERROR("Unsupported EEPROM sizes ratio");
2185 return ERROR_FLASH_OPERATION_FAILED
;
2188 ee_size_code
= log2
| ee_split
<< 4;
2192 COMMAND_PARSE_ON_OFF(CMD_ARGV
[4], enable
);
2196 LOG_INFO("DEPART 0x%" PRIx8
", EEPROM size code 0x%" PRIx8
,
2197 flex_nvm_partition_code
, ee_size_code
);
2199 result
= kinetis_check_run_mode(target
);
2200 if (result
!= ERROR_OK
)
2203 /* reset error flags */
2204 result
= kinetis_ftfx_prepare(target
);
2205 if (result
!= ERROR_OK
)
2208 result
= kinetis_ftfx_command(target
, FTFx_CMD_PGMPART
, load_flex_ram
,
2209 ee_size_code
, flex_nvm_partition_code
, 0, 0,
2211 if (result
!= ERROR_OK
)
2214 command_print(CMD_CTX
, "FlexNVM partition set. Please reset MCU.");
2216 for (i
= 1; i
< 4; i
++) {
2217 bank
= get_flash_bank_by_num_noprobe(i
);
2221 kinfo
= bank
->driver_priv
;
2222 if (kinfo
&& kinfo
->flash_class
== FC_FLEX_NVM
)
2223 kinfo
->probed
= false; /* re-probe before next use */
2226 command_print(CMD_CTX
, "FlexNVM banks will be re-probed to set new data flash size.");
2230 COMMAND_HANDLER(kinetis_fcf_source_handler
)
2233 return ERROR_COMMAND_SYNTAX_ERROR
;
2235 if (CMD_ARGC
== 1) {
2236 if (strcmp(CMD_ARGV
[0], "write") == 0)
2237 allow_fcf_writes
= true;
2238 else if (strcmp(CMD_ARGV
[0], "protection") == 0)
2239 allow_fcf_writes
= false;
2241 return ERROR_COMMAND_SYNTAX_ERROR
;
2244 if (allow_fcf_writes
) {
2245 command_print(CMD_CTX
, "Arbitrary Flash Configuration Field writes enabled.");
2246 command_print(CMD_CTX
, "Protection info writes to FCF disabled.");
2247 LOG_WARNING("BEWARE: incorrect flash configuration may permanently lock the device.");
2249 command_print(CMD_CTX
, "Protection info writes to Flash Configuration Field enabled.");
2250 command_print(CMD_CTX
, "Arbitrary FCF writes disabled. Mode safe from unwanted locking of the device.");
2256 COMMAND_HANDLER(kinetis_fopt_handler
)
2259 return ERROR_COMMAND_SYNTAX_ERROR
;
2262 fcf_fopt
= (uint8_t)strtoul(CMD_ARGV
[0], NULL
, 0);
2264 command_print(CMD_CTX
, "FCF_FOPT 0x%02" PRIx8
, fcf_fopt
);
2270 static const struct command_registration kinetis_security_command_handlers
[] = {
2272 .name
= "check_security",
2273 .mode
= COMMAND_EXEC
,
2274 .help
= "Check status of device security lock",
2276 .handler
= kinetis_check_flash_security_status
,
2280 .mode
= COMMAND_EXEC
,
2281 .help
= "Issue a halt via the MDM-AP",
2283 .handler
= kinetis_mdm_halt
,
2286 .name
= "mass_erase",
2287 .mode
= COMMAND_EXEC
,
2288 .help
= "Issue a complete flash erase via the MDM-AP",
2290 .handler
= kinetis_mdm_mass_erase
,
2293 .mode
= COMMAND_EXEC
,
2294 .help
= "Issue a reset via the MDM-AP",
2296 .handler
= kinetis_mdm_reset
,
2298 COMMAND_REGISTRATION_DONE
2301 static const struct command_registration kinetis_exec_command_handlers
[] = {
2304 .mode
= COMMAND_ANY
,
2305 .help
= "MDM-AP command group",
2307 .chain
= kinetis_security_command_handlers
,
2310 .name
= "disable_wdog",
2311 .mode
= COMMAND_EXEC
,
2312 .help
= "Disable the watchdog timer",
2314 .handler
= kinetis_disable_wdog_handler
,
2317 .name
= "nvm_partition",
2318 .mode
= COMMAND_EXEC
,
2319 .help
= "Show/set data flash or EEPROM backup size in kilobytes,"
2320 " set two EEPROM sizes in bytes and FlexRAM loading during reset",
2321 .usage
= "('info'|'dataflash' size|'eebkp' size) [eesize1 eesize2] ['on'|'off']",
2322 .handler
= kinetis_nvm_partition
,
2325 .name
= "fcf_source",
2326 .mode
= COMMAND_EXEC
,
2327 .help
= "Use protection as a source for Flash Configuration Field or allow writing arbitrary values to the FCF"
2328 " Mode 'protection' is safe from unwanted locking of the device.",
2329 .usage
= "['protection'|'write']",
2330 .handler
= kinetis_fcf_source_handler
,
2334 .mode
= COMMAND_EXEC
,
2335 .help
= "FCF_FOPT value source in 'kinetis fcf_source protection' mode",
2337 .handler
= kinetis_fopt_handler
,
2339 COMMAND_REGISTRATION_DONE
2342 static const struct command_registration kinetis_command_handler
[] = {
2345 .mode
= COMMAND_ANY
,
2346 .help
= "Kinetis flash controller commands",
2348 .chain
= kinetis_exec_command_handlers
,
2350 COMMAND_REGISTRATION_DONE
2355 struct flash_driver kinetis_flash
= {
2357 .commands
= kinetis_command_handler
,
2358 .flash_bank_command
= kinetis_flash_bank_command
,
2359 .erase
= kinetis_erase
,
2360 .protect
= kinetis_protect
,
2361 .write
= kinetis_write
,
2362 .read
= default_flash_read
,
2363 .probe
= kinetis_probe
,
2364 .auto_probe
= kinetis_auto_probe
,
2365 .erase_check
= kinetis_blank_check
,
2366 .protect_check
= kinetis_protect_check
,
2367 .info
= kinetis_info
,