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aarch64: Add support for debugging in HYP mode on ARMv8-A cores 55/5255/4
authorLucas <public@x3ro.de>
Sun, 17 May 2020 15:42:39 +0000 (16:42 +0100)
committerAntonio Borneo <borneo.antonio@gmail.com>
Sat, 27 Jun 2020 14:33:57 +0000 (15:33 +0100)
commit2e6904eef5e81e71453168ed8c6f649e3a5c0f6c
tree5c920a4e3997c881e3f3da5a733562582188189atree | snapshot
parent8833c889da07eae750bcbc11215cc84323de9b74commit | diff
aarch64: Add support for debugging in HYP mode on ARMv8-A cores

When debugging an ARMv8-A/AArch32 target running HYP mode, OpenOCD would
throw the following error to GDB on most operations (step, set breakpoint):

cannot read system control register in this mode

The mode in question is 0x1A, a privilege level 2 mode available on cores
that have the virtualization extensions (such as the Raspi 3).

Note: this mode is only used when running in AArch32 compatibility mode.

Signed-off-by: Lucas Jenss <public@x3ro.de>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Change-Id: Ia8673ff34c5b3eed60e24d8da57c3ca8197a60c2
Reviewed-on: http://openocd.zylin.com/5255
Tested-by: jenkins
Reviewed-by: Lucas Jenß <lucas.jenss@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
src/target/aarch64.c diff | blob | history
src/target/armv8.c diff | blob | history
src/target/armv8.h diff | blob | history
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