review.openocd Code Review - openocd.git/commit

author	Jonas Norling <jonas.norling@cyanconnode.com>
	Tue, 17 Oct 2017 06:57:06 +0000 (08:57 +0200)
committer	Tomas Vanek <vanekt@fbl.cz>
	Wed, 14 Feb 2018 08:27:57 +0000 (08:27 +0000)
commit	6d390e1b2a393505b38e1d0fcd741cd0b1cf92aa
tree	7e44525f106c5ade019ac5f8cd6cf97cdb67517f	tree \| snapshot
parent	e9f54db0033ad1f98a5a8e8168113e74a2d21ee8	commit \| diff

efm32: Refactor EFM32 chip family data, add more chips

Add support for more EFM32/EFR32 Series 1 families. The family IDs
come from the DEVICE_FAMILY list in the EFM32GG11 reference manual,
which is the most up to date source I could find. Register locations
have been checked against SiLab's header files.

No datasheets or headers were available for EFR32MG2, EFR32xG14 and
EFM32TG11B, so they are just assumed to follow the pattern. EFM32GG11B
has the MSC registers on a different address compared to other chips.

This commit attempts not to change current behavior when detecting
chips. One detail that has changed is that PAGE_SIZE is read before
applying the workaround for old Giant and Leopard Gecko revisions, but
this is believed to be OK because the register exists but just has an
invalid value in it.

The manuals disagree on which of 120 and 121 is WG, so this commit
leaves it as is.

Change-Id: Ia152b0b9e323defc5158cb02d9a6b04a27008f2a
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4263
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>

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