ARM: "armv4_5" command prefix becomes "arm"

[openocd.git] / tcl / target / ti_dm355.cfg

diff --git a/tcl/target/ti_dm355.cfg b/tcl/target/ti_dm355.cfg
index 67b3f7a48af85ead5ffd2002cd260156bceecb54..2551c3ed4c361d815fcd7a2b478f7da2fa935ae2 100644 (file)
--- a/tcl/target/ti_dm355.cfg
+++ b/tcl/target/ti_dm355.cfg
@@ -6,19 +6,14 @@ if { [info exists CHIPNAME] } {
 } else {
    set  _CHIPNAME dm355
 }
-if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
-} else {
-   set  _ENDIAN little
-}
 
 # TI boards default to EMU0/EMU1 *high* -- ARM and ETB are *disabled*
 # after JTAG reset until ICEpick is used to route them in.
-#set EMU01 "-disable"
+set EMU01 "-disable"
 
 # With EMU0/EMU1 jumpered *low* ARM and ETB are *enabled* without
 # needing any ICEpick interaction.
-set EMU01 "-enable"
+#set EMU01 "-enable"
 
 source [find target/icepick.cfg]
 
@@ -33,8 +28,7 @@ if { [info exists ETB_TAPID ] } {
 } else {
    set _ETB_TAPID 0x2b900f0f
 }
-jtag newtap $_CHIPNAME etb -irlen 4 -ircapture 0x1 -irmask 0xf \
-       -expected-id $_ETB_TAPID $EMU01
+jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETB_TAPID $EMU01
 jtag configure $_CHIPNAME.etb -event tap-enable \
        "icepick_c_tapenable $_CHIPNAME.jrc 1"
 
@@ -44,8 +38,7 @@ if { [info exists CPU_TAPID ] } {
 } else {
    set _CPU_TAPID 0x07926001
 }
-jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0xf \
-       -expected-id $_CPU_TAPID $EMU01
+jtag newtap $_CHIPNAME arm -irlen 4 -irmask 0xf -expected-id $_CPU_TAPID $EMU01
 jtag configure $_CHIPNAME.arm -event tap-enable \
        "icepick_c_tapenable $_CHIPNAME.jrc 0"
 
@@ -55,7 +48,10 @@ if { [info exists JRC_TAPID ] } {
 } else {
    set _JRC_TAPID 0x0b73b02f
 }
-jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID
+jtag newtap $_CHIPNAME jrc -irlen 6 -irmask 0x3f -expected-id $_JRC_TAPID
+
+jtag configure $_CHIPNAME.jrc -event setup \
+       "jtag tapenable $_CHIPNAME.etb; jtag tapenable $_CHIPNAME.arm"
 
 ################
 
@@ -89,7 +85,7 @@ source [find target/davinci.cfg]
 # and the ETB memory (4K) are other options, while trace is unused.
 set _TARGETNAME $_CHIPNAME.arm
 
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME arm926ejs -chain-position $_TARGETNAME
 
 # NOTE that work-area-virt presumes a Linux 2.6.30-rc2+ kernel,
 # and that the work area is used only with a kernel mmu context ...