Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface

[openocd.git] / tcl / target / stm32h7x.cfg

diff --git a/tcl/target/stm32h7x.cfg b/tcl/target/stm32h7x.cfg
index 763a7857a08cb6cffc104658d93805a66b7dc9f7..8258e50312784bc49756e8c1633afc204fa5644e 100644 (file)
--- a/tcl/target/stm32h7x.cfg
+++ b/tcl/target/stm32h7x.cfg
@@ -104,6 +104,23 @@ if {[set $_CHIPNAME.DUAL_CORE]} {
 # Make sure that cpu0 is selected
 targets $_CHIPNAME.cpu0
 
 # Make sure that cpu0 is selected
 targets $_CHIPNAME.cpu0
 

+if { [info exists QUADSPI] && $QUADSPI } {
+   set a [llength [flash list]]
+   set _QSPINAME $_CHIPNAME.qspi
+   flash bank $_QSPINAME stmqspi 0x90000000 0 0 0 $_CHIPNAME.cpu0 0x52005000
+} else {
+   if { [info exists OCTOSPI1] && $OCTOSPI1 } {
+      set a [llength [flash list]]
+      set _OCTOSPINAME1 $_CHIPNAME.octospi1
+      flash bank $_OCTOSPINAME1 stmqspi 0x90000000 0 0 0 $_CHIPNAME.cpu0 0x52005000
+   }
+   if { [info exists OCTOSPI2] && $OCTOSPI2 } {
+      set b [llength [flash list]]
+      set _OCTOSPINAME2 $_CHIPNAME.octospi2
+      flash bank $_OCTOSPINAME2 stmqspi 0x70000000 0 0 0 $_CHIPNAME.cpu0 0x5200A000
+   }
+}
+

 # Clock after reset is HSI at 64 MHz, no need of PLL
 adapter speed 1800
 
 # Clock after reset is HSI at 64 MHz, no need of PLL
 adapter speed 1800