stm32 configs: use 4kB working area size by default

[openocd.git] / tcl / target / stm32f1x.cfg

diff --git a/tcl/target/stm32f1x.cfg b/tcl/target/stm32f1x.cfg
index 2390f28947e99baab7d1328a7aaafbabb76db3af..12d33d52c5297ecdb05b3cb58590f65746069c3c 100644 (file)
--- a/tcl/target/stm32f1x.cfg
+++ b/tcl/target/stm32f1x.cfg
@@ -1,9 +1,9 @@
-# script for stm32
+# script for stm32f1x family
 
 if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
 } else {
-   set _CHIPNAME stm32
+   set _CHIPNAME stm32f1x
 }
 
 if { [info exists ENDIAN] } {
@@ -13,11 +13,11 @@ if { [info exists ENDIAN] } {
 }
 
 # Work-area is a space in RAM used for flash programming
-# By default use 16kB
+# By default use 4kB (as found on some STM32F100s)
 if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE $WORKAREASIZE
 } else {
-   set _WORKAREASIZE 0x4000
+   set _WORKAREASIZE 0x1000
 }
 
 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
@@ -68,7 +68,7 @@ jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
        -expected-id $_BSTAPID8 -expected-id $_BSTAPID9
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -78,4 +78,4 @@ flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
 
 # if srst is not fitted use SYSRESETREQ to
 # perform a soft reset
-cortex_m3 reset_config sysresetreq
+cortex_m reset_config sysresetreq