# http://focus.ti.com/docs/prod/folders/print/omap3530.html
# Other OMAP3 chips remove DSP and/or the OpenGL support
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
set _CHIPNAME omap3530
}
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f \
-expected-id $_JRC_TAPID
-# GDB target: Cortex-A8, using DAP
+jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
-# FIXME when we have A8 support, use it. A8 != M3 ...
-target create omap3.cpu cortex_m3 -chain-position $_CHIPNAME.dap
+# GDB target: Cortex-A8, using DAP
+target create omap3.cpu cortex_a8 -chain-position $_CHIPNAME.dap
# FIXME much of this should be in reset event handlers
proc omap3_dbginit { } {
- reset
- sleep 500
+ poll off
+ sleep 100
jtag tapenable omap3530.dap
targets
- # sleep 1000
- # dap apsel 1
- # sleep 1000
- # dap apsel 1
- # dap info 1
+ # General Cortex A8 debug initialisation
+ cortex_a8 dbginit
+ # Enable DBGU signal for OMAP353x
+ omap3.cpu mww 0x5401d030 0x00002000
+ poll on
+}
- # 0xd401.0000 - ETM
- # 0xd401.1000 - Cortex-A8
- # 0xd401.9000 - TPIU (traceport)
- # 0xd401.b000 - ETB
- # 0xd401.d000 - DAPCTL
+set PRM_RSTCTRL 0x48307250
- omap3.cpu mww 0x54011FB0 0xC5ACCE55
+omap3.cpu configure -event reset-start "omap3.cpu mww $PRM_RSTCTRL 2"
+omap3.cpu configure -event reset-assert-pre "omap3_dbginit"
- omap3.cpu mdw 0x54011314
- omap3.cpu mdw 0x54011314
- # omap3.cpu mdw 0x54011080
- omap3.cpu mww 0x5401d030 0x00002000
-}