-jtag_khz 4
+adapter_khz 4
######################################
# Target: Atmel AT91SAM9260
######################################
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
set _CHIPNAME at91sam9260
}
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
set _ENDIAN little
}
reset_config trst_and_srst
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
# Target configuration
######################
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
$_TARGETNAME invoke-event halted
# Internal sram1 memory
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1
+$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1
scan_chain
$_TARGETNAME configure -event reset-deassert-post {at91sam_init}
# Flash configuration
#flash bank cfi <base> <size> <chip width> <bus width> <target#>
-flash bank cfi 0x10000000 0x01000000 2 2 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x10000000 0x01000000 2 2 $_TARGETNAME
proc at91sam_init { } {
-
+
# at reset chip runs at 32khz
- jtag_khz 8
+ adapter_khz 8
halt
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog
sleep 10 # wait 10 ms
# Now run at anything fast... ie: 10mhz!
- jtag_khz 10000 # Increase JTAG Speed to 6 MHz
+ adapter_khz 10000 # Increase JTAG Speed to 6 MHz
arm7_9 dcc_downloads enable # Enable faster DCC downloads
mww 0xffffec00 0x0a0a0a0a # SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBit