cfg: Don't check BS TAP IDCODE in STM32 configs

[openocd.git] / tcl / target / am335x.cfg

diff --git a/tcl/target/am335x.cfg b/tcl/target/am335x.cfg
index af06f79ad0800a0969780caedcdd6eea6591b2c8..74096151e660aa27604557e07d1c7689b4e1d101 100644 (file)
--- a/tcl/target/am335x.cfg
+++ b/tcl/target/am335x.cfg
@@ -1,29 +1,30 @@
+source [find target/icepick.cfg]
 
 if { [info exists CHIPNAME] } {
-   set _CHIPNAME $CHIPNAME
+       set _CHIPNAME $CHIPNAME
 } else {
-   set _CHIPNAME am335x
+       set _CHIPNAME am335x
 }
 
-# This chip contains an IcePick-D JTAG router.  The IcePick-C configuration is almost
-# compatible, but it doesn't work.  For now, we will just embed the IcePick-D
-# routines here.
-proc icepick_d_tapenable {jrc port} {
-       # select router
-       irscan $jrc 7 -endstate IRPAUSE
-       drscan $jrc 8 0x89 -endstate DRPAUSE
-
-       # set ip control
-       irscan $jrc 2 -endstate IRPAUSE
-       drscan $jrc 32 [expr 0xa0002108 + ($port << 24)] -endstate DRPAUSE
-
-       # for icepick_D
-       irscan $jrc 2 -endstate IRPAUSE
-       drscan $jrc 32 0xe0002008 -endstate DRPAUSE
+# set the taps to be enabled by default. this can be overridden
+# by setting DEFAULT_TAPS in a separate configuration file
+# or directly on the command line.
+if { [info exists DEFAULT_TAPS] } {
+       set _DEFAULT_TAPS "$DEFAULT_TAPS"
+} else {
+       set _DEFAULT_TAPS "$_CHIPNAME.dap"
+}
 
-       irscan $jrc 0x3F -endstate RUN/IDLE
-       runtest 10
+#
+# Main DAP
+#
+if { [info exists DAP_TAPID] } {
+       set _DAP_TAPID $DAP_TAPID
+} else {
+       set _DAP_TAPID 0x4b6b902f
 }
+jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
+jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12 0"
 
 #
 # M3 DAP
@@ -34,43 +35,44 @@ if { [info exists M3_DAP_TAPID] } {
        set _M3_DAP_TAPID 0x4b6b902f
 }
 jtag newtap $_CHIPNAME m3_dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable
-jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11"
-
-#
-# Main DAP
-#
-if { [info exists DAP_TAPID] } {
-   set _DAP_TAPID $DAP_TAPID
-} else {
-   set _DAP_TAPID 0x4b6b902f
-}
-jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
-jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12"
+jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11 0"
 
 #
 # ICEpick-D (JTAG route controller)
 #
 if { [info exists JRC_TAPID] } {
-   set _JRC_TAPID $JRC_TAPID
+       set _JRC_TAPID $JRC_TAPID
 } else {
-   set _JRC_TAPID 0x0b94402f
+       set _JRC_TAPID 0x0b94402f
 }
 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
-jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
+jtag configure $_CHIPNAME.jrc -event setup {
+       global _DEFAULT_TAPS
+       enable_default_taps $_DEFAULT_TAPS
+}
 # some TCK tycles are required to activate the DEBUG power domain
 jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
 
 #
-# Cortex A8 target
+# helper function that enables all taps passed as argument
+#
+proc enable_default_taps { taps } {
+       foreach tap $taps {
+               jtag tapenable $tap
+       }
+}
+
+#
+# Cortex-M3 target
+#
+set _TARGETNAME_2 $_CHIPNAME.m3
+target create $_TARGETNAME_2 cortex_m -chain-position $_CHIPNAME.m3_dap
+
+#
+# Cortex-A8 target
 #
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap -dbgbase 0x80001000
 
 # SRAM: 64K at 0x4030.0000; use the first 16K
 $_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x4000
-
-$_TARGETNAME configure -event gdb-attach {
-   cortex_a dbginit
-   halt
-}
-