#include "config.h"
#endif
-#include "replacements.h"
-
#include "xscale.h"
-
+#include "target_type.h"
#include "arm7_9_common.h"
-#include "register.h"
-#include "target.h"
-#include "armv4_5.h"
#include "arm_simulator.h"
#include "arm_disassembler.h"
-#include "log.h"
-#include "jtag.h"
-#include "binarybuffer.h"
#include "time_support.h"
-#include "breakpoints.h"
-#include "fileio.h"
-
-#include <stdlib.h>
-#include <string.h>
-
-#include <unistd.h>
-#include <errno.h>
-
+#include "image.h"
/* cli handling */
int xscale_register_commands(struct command_context_s *cmd_ctx);
int xscale_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode);
int xscale_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, u32 value);
-int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-int xscale_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer);
+int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
+int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
+int xscale_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer);
int xscale_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
int xscale_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
int xscale_reg_arch_type = -1;
int xscale_get_reg(reg_t *reg);
-int xscale_set_reg(reg_t *reg, u8 *buf);
+int xscale_set_reg(reg_t *reg, uint8_t *buf);
int xscale_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, xscale_common_t **xscale_p)
{
field.out_value = calloc(CEIL(field.num_bits, 8), 1);
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
- u8 tmp[4];
+ uint8_t tmp[4];
field.in_value = tmp;
- jtag_add_ir_scan(1, &field, TAP_INVALID);
+ jtag_add_ir_scan(1, &field, jtag_get_end_state());
+ /* FIX!!!! isn't this check superfluous? verify_ircapture handles this? */
jtag_check_value_mask(&field, tap->expected, tap->expected_mask);
free(field.out_value);
int retval;
scan_field_t fields[3];
- u8 field0 = 0x0;
- u8 field0_check_value = 0x2;
- u8 field0_check_mask = 0x7;
- u8 field2 = 0x0;
- u8 field2_check_value = 0x0;
- u8 field2_check_mask = 0x1;
-
- jtag_add_end_state(TAP_DRPAUSE);
+ uint8_t field0 = 0x0;
+ uint8_t field0_check_value = 0x2;
+ uint8_t field0_check_mask = 0x7;
+ uint8_t field2 = 0x0;
+ uint8_t field2_check_value = 0x0;
+ uint8_t field2_check_mask = 0x1;
+
+ jtag_set_end_state(TAP_DRPAUSE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dcsr);
buf_set_u32(&field0, 1, 1, xscale->hold_rst);
fields[0].tap = xscale->jtag_info.tap;
fields[0].num_bits = 3;
fields[0].out_value = &field0;
- u8 tmp;
+ uint8_t tmp;
fields[0].in_value = &tmp;
fields[1].tap = xscale->jtag_info.tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
fields[1].in_value = xscale->reg_cache->reg_list[XSCALE_DCSR].value;
-
+
fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1;
fields[2].out_value = &field2;
- u8 tmp2;
+ uint8_t tmp2;
fields[2].in_value = &tmp2;
- jtag_add_dr_scan(3, fields, TAP_INVALID);
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
fields[1].out_value = xscale->reg_cache->reg_list[XSCALE_DCSR].value;
fields[1].in_value = NULL;
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
- jtag_add_dr_scan(3, fields, TAP_INVALID);
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
/* DANGER!!! this must be here. It will make sure that the arguments
* to jtag_set_check_value() does not go out of scope! */
return jtag_execute_queue();
}
+
+static void xscale_getbuf(uint8_t *in)
+{
+ *((u32 *)in)=buf_get_u32(in, 0, 32);
+}
+
int xscale_receive(target_t *target, u32 *buffer, int num_words)
{
if (num_words==0)
tap_state_t path[3];
scan_field_t fields[3];
- u8 *field0 = malloc(num_words * 1);
- u8 field0_check_value = 0x2;
- u8 field0_check_mask = 0x6;
+ uint8_t *field0 = malloc(num_words * 1);
+ uint8_t field0_check_value = 0x2;
+ uint8_t field0_check_mask = 0x6;
u32 *field1 = malloc(num_words * 4);
- u8 field2_check_value = 0x0;
- u8 field2_check_mask = 0x1;
+ uint8_t field2_check_value = 0x0;
+ uint8_t field2_check_mask = 0x1;
int words_done = 0;
int words_scheduled = 0;
fields[0].tap = xscale->jtag_info.tap;
fields[0].num_bits = 3;
fields[0].out_value = NULL;
- u8 tmp2;
- fields[0].in_value = &tmp2;
+ fields[0].in_value = NULL;
+ fields[0].check_value = &field0_check_value;
+ fields[0].check_mask = &field0_check_mask;
fields[1].tap = xscale->jtag_info.tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
- u8 tmp[4];
- fields[1].in_value = tmp;
-
+ fields[1].check_value = NULL;
+ fields[1].check_mask = NULL;
fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1;
fields[2].out_value = NULL;
- u8 tmp3;
- fields[2].in_value = &tmp3;
+ fields[2].in_value = NULL;
+ fields[2].check_value = &field2_check_value;
+ fields[2].check_mask = &field2_check_mask;
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dbgtx);
- jtag_add_runtest(1, TAP_INVALID); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */
+ jtag_add_runtest(1, jtag_get_end_state()); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */
/* repeat until all words have been collected */
int attempts=0;
fields[0].in_value = &field0[i];
jtag_add_pathmove(3, path);
- jtag_add_dr_scan_now(3, fields, TAP_IDLE);
- jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
- jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
+ fields[1].in_value = (uint8_t *)(field1+i);
+
+ jtag_add_dr_scan_check(3, fields, jtag_set_end_state(TAP_IDLE));
- field1[i]=buf_get_u32(tmp, 0, 32);
+ jtag_add_callback(xscale_getbuf, (uint8_t *)(field1+i));
words_scheduled++;
}
}
for (i = 0; i < num_words; i++)
- *(buffer++) = buf_get_u32((u8*)&field1[i], 0, 32);
+ *(buffer++) = buf_get_u32((uint8_t*)&field1[i], 0, 32);
free(field1);
struct timeval timeout, now;
scan_field_t fields[3];
- u8 field0_in = 0x0;
- u8 field0_check_value = 0x2;
- u8 field0_check_mask = 0x6;
- u8 field2_check_value = 0x0;
- u8 field2_check_mask = 0x1;
+ uint8_t field0_in = 0x0;
+ uint8_t field0_check_value = 0x2;
+ uint8_t field0_check_mask = 0x6;
+ uint8_t field2_check_value = 0x0;
+ uint8_t field2_check_mask = 0x1;
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dbgtx);
fields[1].num_bits = 32;
fields[1].out_value = NULL;
fields[1].in_value = xscale->reg_cache->reg_list[XSCALE_TX].value;
-
+
fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1;
fields[2].out_value = NULL;
- u8 tmp;
+ uint8_t tmp;
fields[2].in_value = &tmp;
gettimeofday(&timeout, NULL);
jtag_add_pathmove(sizeof(noconsume_path)/sizeof(*noconsume_path), noconsume_path);
}
- jtag_add_dr_scan(3, fields, TAP_IDLE);
+ jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_IDLE));
jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
struct timeval timeout, now;
scan_field_t fields[3];
- u8 field0_out = 0x0;
- u8 field0_in = 0x0;
- u8 field0_check_value = 0x2;
- u8 field0_check_mask = 0x6;
- u8 field2 = 0x0;
- u8 field2_check_value = 0x0;
- u8 field2_check_mask = 0x1;
+ uint8_t field0_out = 0x0;
+ uint8_t field0_in = 0x0;
+ uint8_t field0_check_value = 0x2;
+ uint8_t field0_check_mask = 0x6;
+ uint8_t field2 = 0x0;
+ uint8_t field2_check_value = 0x0;
+ uint8_t field2_check_mask = 0x1;
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dbgrx);
fields[1].num_bits = 32;
fields[1].out_value = xscale->reg_cache->reg_list[XSCALE_RX].value;
fields[1].in_value = NULL;
-
+
fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1;
fields[2].out_value = &field2;
- u8 tmp;
+ uint8_t tmp;
fields[2].in_value = &tmp;
gettimeofday(&timeout, NULL);
LOG_DEBUG("polling RX");
for (;;)
{
- jtag_add_dr_scan(3, fields, TAP_IDLE);
+ jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_IDLE));
jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
/* set rx_valid */
field2 = 0x1;
- jtag_add_dr_scan(3, fields, TAP_IDLE);
+ jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_IDLE));
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
}
/* send count elements of size byte to the debug handler */
-int xscale_send(target_t *target, u8 *buffer, int count, int size)
+int xscale_send(target_t *target, uint8_t *buffer, int count, int size)
{
armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info;
int done_count = 0;
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dbgrx);
3,
bits,
t,
- TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE));
buffer += size;
}
int retval;
scan_field_t fields[3];
- u8 field0 = 0x0;
- u8 field0_check_value = 0x2;
- u8 field0_check_mask = 0x7;
- u8 field2 = 0x0;
- u8 field2_check_value = 0x0;
- u8 field2_check_mask = 0x1;
+ uint8_t field0 = 0x0;
+ uint8_t field0_check_value = 0x2;
+ uint8_t field0_check_mask = 0x7;
+ uint8_t field2 = 0x0;
+ uint8_t field2_check_value = 0x0;
+ uint8_t field2_check_mask = 0x1;
if (hold_rst != -1)
xscale->hold_rst = hold_rst;
if (ext_dbg_brk != -1)
xscale->external_debug_break = ext_dbg_brk;
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dcsr);
buf_set_u32(&field0, 1, 1, xscale->hold_rst);
fields[0].tap = xscale->jtag_info.tap;
fields[0].num_bits = 3;
fields[0].out_value = &field0;
- u8 tmp;
+ uint8_t tmp;
fields[0].in_value = &tmp;
fields[1].tap = xscale->jtag_info.tap;
fields[1].num_bits = 32;
fields[1].out_value = xscale->reg_cache->reg_list[XSCALE_DCSR].value;
fields[1].in_value = NULL;
-
+
fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1;
fields[2].out_value = &field2;
- u8 tmp2;
+ uint8_t tmp2;
fields[2].in_value = &tmp2;
- jtag_add_dr_scan(3, fields, TAP_INVALID);
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
{
armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info;
- u8 packet[4];
- u8 cmd;
+ uint8_t packet[4];
+ uint8_t cmd;
int word;
scan_field_t fields[2];
LOG_DEBUG("loading miniIC at 0x%8.8x", va);
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.ldic); /* LDIC */
/* CMD is b010 for Main IC and b011 for Mini IC */
fields[0].in_value = NULL;
-
+
fields[1].tap = xscale->jtag_info.tap;
fields[1].in_value = NULL;
-
- jtag_add_dr_scan(2, fields, TAP_INVALID);
+
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
fields[0].num_bits = 32;
fields[0].out_value = packet;
memcpy(&value, packet, sizeof(u32));
cmd = parity(value);
- jtag_add_dr_scan(2, fields, TAP_INVALID);
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
}
jtag_execute_queue();
{
armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info;
- u8 packet[4];
- u8 cmd;
+ uint8_t packet[4];
+ uint8_t cmd;
scan_field_t fields[2];
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.ldic); /* LDIC */
/* CMD for invalidate IC line b000, bits [6:4] b000 */
fields[0].in_value = NULL;
-
+
fields[1].tap = xscale->jtag_info.tap;
fields[1].in_value = NULL;
-
- jtag_add_dr_scan(2, fields, TAP_INVALID);
+
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
return ERROR_OK;
}
/* select DCSR instruction (set endstate to R-T-I to ensure we don't
* end up in T-L-R, which would reset JTAG
*/
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dcsr);
/* set Hold reset, Halt mode and Trap Reset */
/* wait 300ms; 150 and 100ms were not enough */
jtag_add_sleep(300*1000);
- jtag_add_runtest(2030, TAP_IDLE);
+ jtag_add_runtest(2030, jtag_set_end_state(TAP_IDLE));
jtag_execute_queue();
/* set Hold reset, Halt mode and Trap Reset */
while (binary_size > 0)
{
u32 cache_line[8];
- u8 buffer[32];
+ uint8_t buffer[32];
if ((retval = fileio_read(&debug_handler, 32, buffer, &buf_cnt)) != ERROR_OK)
{
xscale_load_ic(target, 1, 0x0, xscale->low_vectors);
xscale_load_ic(target, 1, 0xffff0000, xscale->high_vectors);
- jtag_add_runtest(30, TAP_IDLE);
+ jtag_add_runtest(30, jtag_set_end_state(TAP_IDLE));
jtag_add_sleep(100000);
return ERROR_OK;
}
-int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{
armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info;
return ERROR_OK;
}
-int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{
armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info;
return ERROR_OK;
}
-int xscale_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer)
+int xscale_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer)
{
return xscale_write_memory(target, address, 4, count, buffer);
}
if (breakpoint->length == 4)
{
/* keep the original instruction in target endianness */
- if((retval = target->type->read_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
+ if((retval = target_read_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
{
return retval;
}
else
{
/* keep the original instruction in target endianness */
- if((retval = target->type->read_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
+ if((retval = target_read_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
{
return retval;
}
/* restore original instruction (kept in target endianness) */
if (breakpoint->length == 4)
{
- if((retval = target->type->write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
+ if((retval = target_write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
{
return retval;
}
}
else
{
- if((retval = target->type->write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
+ if((retval = target_write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
{
return retval;
}
{
armv4_5_common_t *armv4_5 = target->arch_info;
xscale_common_t *xscale = armv4_5->arch_info;
- u8 enable=0;
+ uint8_t enable=0;
reg_t *dbcon = &xscale->reg_cache->reg_list[XSCALE_DBCON];
u32 dbcon_value = buf_get_u32(dbcon->value, 0, 32);
return ERROR_OK;
}
-int xscale_set_reg(reg_t *reg, u8* buf)
+int xscale_set_reg(reg_t *reg, uint8_t* buf)
{
xscale_reg_t *arch_info = reg->arch_info;
target_t *target = arch_info->target;
/* convenience wrapper to access XScale specific registers */
int xscale_set_reg_u32(reg_t *reg, u32 value)
{
- u8 buf[4];
+ uint8_t buf[4];
buf_set_u32(buf, 0, 32, value);
if (xscale->trace.core_state == ARMV4_5_STATE_ARM)
{
- u8 buf[4];
+ uint8_t buf[4];
if ((retval = image_read_section(xscale->trace.image, section,
xscale->trace.current_pc - xscale->trace.image->sections[section].base_address,
4, buf, &size_read)) != ERROR_OK)
}
else if (xscale->trace.core_state == ARMV4_5_STATE_THUMB)
{
- u8 buf[2];
+ uint8_t buf[2];
if ((retval = image_read_section(xscale->trace.image, section,
xscale->trace.current_pc - xscale->trace.image->sections[section].base_address,
2, buf, &size_read)) != ERROR_OK)
return ERROR_OK;
}
- if ((target = get_target_by_num(strtoul(args[0], NULL, 0))) == NULL)
+ if ((target = get_target(args[0])) == NULL)
{
- LOG_ERROR("no target '%s' configured", args[0]);
+ LOG_ERROR("target '%s' not defined", args[0]);
return ERROR_FAIL;
}
return ERROR_COMMAND_SYNTAX_ERROR;
}
- if ((target = get_target_by_num(strtoul(args[0], NULL, 0))) == NULL)
+ target = get_target(args[0]);
+ if (target == NULL)
{
- LOG_ERROR("no target '%s' configured", args[0]);
+ LOG_ERROR("target '%s' not defined", args[0]);
return ERROR_FAIL;
}