/* convenience wrapper to access XScale specific registers */
static int xscale_set_reg_u32(struct reg *reg, uint32_t value)
{
- uint8_t buf[4];
+ uint8_t buf[4] = { 0 };
buf_set_u32(buf, 0, 32, value);
struct xscale_common *xscale)
{
if (xscale->common_magic != XSCALE_COMMON_MAGIC) {
- command_print(cmd->ctx, xscale_not);
+ command_print(cmd, xscale_not);
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) {
struct scan_field field;
- uint8_t scratch[4];
+ uint8_t scratch[4] = { 0 };
- memset(&field, 0, sizeof field);
+ memset(&field, 0, sizeof(field));
field.num_bits = tap->ir_length;
field.out_value = scratch;
buf_set_u32(scratch, 0, field.num_bits, new_instr);
buf_set_u32(&field0, 1, 1, xscale->hold_rst);
buf_set_u32(&field0, 2, 1, xscale->external_debug_break);
- memset(&fields, 0, sizeof fields);
+ memset(&fields, 0, sizeof(fields));
fields[0].num_bits = 3;
fields[0].out_value = &field0;
path[1] = TAP_DRCAPTURE;
path[2] = TAP_DRSHIFT;
- memset(&fields, 0, sizeof fields);
+ memset(&fields, 0, sizeof(fields));
fields[0].num_bits = 3;
uint8_t tmp;
noconsume_path[4] = TAP_DREXIT2;
noconsume_path[5] = TAP_DRSHIFT;
- memset(&fields, 0, sizeof fields);
+ memset(&fields, 0, sizeof(fields));
fields[0].num_bits = 3;
fields[0].in_value = &field0_in;
XSCALE_DBGRX << xscale->xscale_variant,
TAP_IDLE);
- memset(&fields, 0, sizeof fields);
+ memset(&fields, 0, sizeof(fields));
fields[0].num_bits = 3;
fields[0].out_value = &field0_out;
TAP_IDLE);
static const uint8_t t0;
- uint8_t t1[4];
+ uint8_t t1[4] = { 0 };
static const uint8_t t2 = 1;
struct scan_field fields[3] = {
{ .num_bits = 3, .out_value = &t0 },
buf_set_u32(&field0, 1, 1, xscale->hold_rst);
buf_set_u32(&field0, 2, 1, xscale->external_debug_break);
- memset(&fields, 0, sizeof fields);
+ memset(&fields, 0, sizeof(fields));
fields[0].num_bits = 3;
fields[0].out_value = &field0;
static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8])
{
struct xscale_common *xscale = target_to_xscale(target);
- uint8_t packet[4];
- uint8_t cmd;
+ uint8_t packet[4] = { 0 };
+ uint8_t cmd = 0;
int word;
struct scan_field fields[2];
/* virtual address of desired cache line */
buf_set_u32(packet, 0, 27, va >> 5);
- memset(&fields, 0, sizeof fields);
+ memset(&fields, 0, sizeof(fields));
fields[0].num_bits = 6;
fields[0].out_value = &cmd;
static int xscale_invalidate_ic_line(struct target *target, uint32_t va)
{
struct xscale_common *xscale = target_to_xscale(target);
- uint8_t packet[4];
- uint8_t cmd;
+ uint8_t packet[4] = { 0 };
+ uint8_t cmd = 0;
struct scan_field fields[2];
xscale_jtag_set_instr(target->tap,
/* virtual address of desired cache line */
buf_set_u32(packet, 0, 27, va >> 5);
- memset(&fields, 0, sizeof fields);
+ memset(&fields, 0, sizeof(fields));
fields[0].num_bits = 6;
fields[0].out_value = &cmd;
retval = xscale_debug_entry(target);
} else if (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
LOG_USER("error while polling TX register, reset CPU");
- /* here we "lie" so GDB won't get stuck and a reset can be perfomed */
+ /* here we "lie" so GDB won't get stuck and a reset can be performed */
target->state = TARGET_HALTED;
}
xscale->arch_debug_reason = XSCALE_DBG_REASON_GENERIC;
pc -= 4;
break;
- case 0x5: /* Vector trap occured */
+ case 0x5: /* Vector trap occurred */
target->debug_reason = DBG_REASON_BREAKPOINT;
xscale->arch_debug_reason = XSCALE_DBG_REASON_GENERIC;
pc -= 4;
struct xscale_trace_data *td = xscale->trace.data;
while (td) {
struct xscale_trace_data *next_td = td->next;
- if (td->entries)
- free(td->entries);
+ free(td->entries);
free(td);
td = next_td;
}
* coprocessors, trace data, etc.
*/
address = xscale->handler_address;
- for (unsigned binary_size = sizeof xscale_debug_handler;
+ for (unsigned binary_size = sizeof(xscale_debug_handler);
binary_size > 0;
binary_size -= buf_cnt, buffer += buf_cnt) {
uint32_t cache_line[8];
} else if (strcmp(reg->name, "XSCALE_TXRXCTRL") == 0) {
/* can't (explicitly) read from TXRXCTRL register */
return ERROR_OK;
- } else {/* Other DBG registers have to be transfered by the debug handler
+ } else {/* Other DBG registers have to be transferred by the debug handler
* send CP read request (command 0x40) */
xscale_send_u32(target, 0x40);
} else if (strcmp(reg->name, "XSCALE_TXRXCTRL") == 0) {
/* can't (explicitly) write to TXRXCTRL register */
return ERROR_OK;
- } else {/* Other DBG registers have to be transfered by the debug handler
+ } else {/* Other DBG registers have to be transferred by the debug handler
* send CP write request (command 0x41) */
xscale_send_u32(target, 0x41);
struct arm_instruction *instruction)
{
struct xscale_common *const xscale = target_to_xscale(target);
- int i;
int section = -1;
size_t size_read;
uint32_t opcode;
return ERROR_TRACE_IMAGE_UNAVAILABLE;
/* search for the section the current instruction belongs to */
- for (i = 0; i < xscale->trace.image->num_sections; i++) {
+ for (unsigned int i = 0; i < xscale->trace.image->num_sections; i++) {
if ((xscale->trace.image->sections[i].base_address <= pc) &&
(xscale->trace.image->sections[i].base_address +
xscale->trace.image->sections[i].size > pc)) {
{
int retval = xscale_read_instruction(target, pc, instruction);
if (retval == ERROR_OK)
- command_print(cmd->ctx, "%s", instruction->text);
+ command_print(cmd, "%s", instruction->text);
else
- command_print(cmd->ctx, "0x%8.8" PRIx32 "\t<not found in image>", pc);
+ command_print(cmd, "0x%8.8" PRIx32 "\t<not found in image>", pc);
}
static int xscale_analyze_trace(struct target *target, struct command_invocation *cmd)
continue;
if (exception) {
- command_print(cmd->ctx, "--- exception %i ---", exception);
+ command_print(cmd, "--- exception %i ---", exception);
continue;
}
current_pc = chkpt_reg;
else if (current_pc != chkpt_reg) /* sanity check */
LOG_WARNING("trace is suspect: checkpoint register "
- "inconsistent with adddress from image");
+ "inconsistent with address from image");
}
if (current_pc == 0)
- command_print(cmd->ctx, "address unknown");
+ command_print(cmd, "address unknown");
continue;
}
(*cache_p)->reg_list[i].size = 32;
(*cache_p)->reg_list[i].arch_info = &arch_info[i];
(*cache_p)->reg_list[i].type = &xscale_reg_type;
+ (*cache_p)->reg_list[i].exist = true;
arch_info[i] = xscale_reg_arch_info[i];
arch_info[i].target = target;
}
xscale->reg_cache = (*cache_p);
}
+static void xscale_free_reg_cache(struct target *target)
+{
+ struct xscale_common *xscale = target_to_xscale(target);
+ struct reg_cache *cache = xscale->reg_cache;
+
+ for (unsigned int i = 0; i < ARRAY_SIZE(xscale_reg_arch_info); i++)
+ free(cache->reg_list[i].value);
+
+ free(cache->reg_list[0].arch_info);
+ free(cache->reg_list);
+ free(cache);
+
+ arm_free_reg_cache(&xscale->arm);
+}
+
static int xscale_init_target(struct command_context *cmd_ctx,
struct target *target)
{
return ERROR_OK;
}
+static void xscale_deinit_target(struct target *target)
+{
+ struct xscale_common *xscale = target_to_xscale(target);
+
+ xscale_free_reg_cache(target);
+ free(xscale);
+}
+
static int xscale_init_arch_info(struct target *target,
struct xscale_common *xscale, struct jtag_tap *tap)
{
arm = &xscale->arm;
- /* store architecture specfic data */
+ /* store architecture specific data */
xscale->common_magic = XSCALE_COMMON_MAGIC;
/* PXA3xx with 11 bit IR shifts the JTAG instructions */
/* prepare ARMv4/5 specific information */
arm->arch_info = xscale;
- arm->core_type = ARM_MODE_ANY;
+ arm->core_type = ARM_CORE_TYPE_STD;
arm->read_core_reg = xscale_read_core_reg;
arm->write_core_reg = xscale_write_core_reg;
arm->full_context = xscale_full_context;
{
struct xscale_common *xscale;
- if (sizeof xscale_debug_handler > 0x800) {
+ if (sizeof(xscale_debug_handler) > 0x800) {
LOG_ERROR("debug_handler.bin: larger than 2kb");
return ERROR_FAIL;
}
return retval;
if (target->state != TARGET_HALTED) {
- command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
+ command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
xscale->armv4_5_mmu.mmu_enabled = enable;
}
- command_print(CMD_CTX, "mmu %s",
+ command_print(CMD, "mmu %s",
(xscale->armv4_5_mmu.mmu_enabled) ? "enabled" : "disabled");
return ERROR_OK;
return retval;
if (target->state != TARGET_HALTED) {
- command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
+ command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
xscale->armv4_5_mmu.armv4_5_cache.i_cache_enabled :
xscale->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled;
const char *msg = enabled ? "enabled" : "disabled";
- command_print(CMD_CTX, "%s %s", CMD_NAME, msg);
+ command_print(CMD, "%s %s", CMD_NAME, msg);
return ERROR_OK;
}
if (retval != ERROR_OK)
return retval;
- dcsr_value = buf_get_u32(dcsr_reg->value, 0, 32);
if (CMD_ARGC > 0) {
if (CMD_ARGC == 1) {
if (strcmp(CMD_ARGV[0], "all") == 0) {
dcsr_value = buf_get_u32(dcsr_reg->value, 0, 32);
for (unsigned i = 0; i < ARRAY_SIZE(vec_ids); i++) {
- command_print(CMD_CTX, "%15s: %s", vec_ids[i].name,
+ command_print(CMD, "%15s: %s", vec_ids[i].name,
(dcsr_value & vec_ids[i].mask) ? "catch" : "ignore");
}
if (CMD_ARGC == 0) { /* print current settings */
int idx;
- command_print(CMD_CTX, "active user-set static vectors:");
+ command_print(CMD, "active user-set static vectors:");
for (idx = 1; idx < 8; idx++)
if (xscale->static_low_vectors_set & (1 << idx))
- command_print(CMD_CTX,
+ command_print(CMD,
"low %d: 0x%" PRIx32,
idx,
xscale->static_low_vectors[idx]);
for (idx = 1; idx < 8; idx++)
if (xscale->static_high_vectors_set & (1 << idx))
- command_print(CMD_CTX,
+ command_print(CMD,
"high %d: 0x%" PRIx32,
idx,
xscale->static_high_vectors[idx]);
return retval;
if (target->state != TARGET_HALTED) {
- command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
+ command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
if (CMD_ARGC >= 3)
COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], buffcount);
if (buffcount < 1) { /* invalid */
- command_print(CMD_CTX, "fill buffer count must be > 0");
+ command_print(CMD, "fill buffer count must be > 0");
xscale->trace.mode = XSCALE_TRACE_DISABLED;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (xscale->trace.mode != XSCALE_TRACE_DISABLED) {
char fill_string[12];
sprintf(fill_string, "fill %d", xscale->trace.buffer_fill);
- command_print(CMD_CTX, "trace buffer enabled (%s)",
+ command_print(CMD, "trace buffer enabled (%s)",
(xscale->trace.mode == XSCALE_TRACE_FILL)
? fill_string : "wrap");
} else
- command_print(CMD_CTX, "trace buffer disabled");
+ command_print(CMD, "trace buffer disabled");
dcsr_value = buf_get_u32(xscale->reg_cache->reg_list[XSCALE_DCSR].value, 0, 32);
if (xscale->trace.mode == XSCALE_TRACE_FILL)
if (xscale->trace.image) {
image_close(xscale->trace.image);
free(xscale->trace.image);
- command_print(CMD_CTX, "previously loaded image found and closed");
+ command_print(CMD, "previously loaded image found and closed");
}
xscale->trace.image = malloc(sizeof(struct image));
- xscale->trace.image->base_address_set = 0;
- xscale->trace.image->start_address_set = 0;
+ xscale->trace.image->base_address_set = false;
+ xscale->trace.image->start_address_set = false;
/* a base address isn't always necessary, default to 0x0 (i.e. don't relocate) */
if (CMD_ARGC >= 2) {
- xscale->trace.image->base_address_set = 1;
+ xscale->trace.image->base_address_set = true;
COMMAND_PARSE_NUMBER(llong, CMD_ARGV[1], xscale->trace.image->base_address);
} else
- xscale->trace.image->base_address_set = 0;
+ xscale->trace.image->base_address_set = false;
if (image_open(xscale->trace.image, CMD_ARGV[0],
(CMD_ARGC >= 3) ? CMD_ARGV[2] : NULL) != ERROR_OK) {
return retval;
if (target->state != TARGET_HALTED) {
- command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
+ command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
trace_data = xscale->trace.data;
if (!trace_data) {
- command_print(CMD_CTX, "no trace data collected");
+ command_print(CMD, "no trace data collected");
return ERROR_OK;
}
return retval;
if (target->state != TARGET_HALTED) {
- command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
+ command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
uint32_t reg_no = 0;
reg_no = XSCALE_CPACCESS;
break;
default:
- command_print(CMD_CTX, "invalid register number");
+ command_print(CMD, "invalid register number");
return ERROR_COMMAND_SYNTAX_ERROR;
}
reg = &xscale->reg_cache->reg_list[reg_no];
/* read cp15 control register */
xscale_get_reg(reg);
value = buf_get_u32(reg->value, 0, 32);
- command_print(CMD_CTX, "%s (/%i): 0x%" PRIx32 "", reg->name, (int)(reg->size),
+ command_print(CMD, "%s (/%i): 0x%" PRIx32 "", reg->name, (int)(reg->size),
value);
} else if (CMD_ARGC == 2) {
uint32_t value;
.commands = xscale_command_handlers,
.target_create = xscale_target_create,
.init_target = xscale_init_target,
+ .deinit_target = xscale_deinit_target,
.virt2phys = xscale_virt2phys,
.mmu = xscale_mmu
Code Review / openocd.git / blobdiff