target/image: Use proper data types
[openocd.git] / src / target / xscale.c
index 3ef8922b529eb568f8e5857295f8ac6f6b05c40d..aaaed0ebb2d0cfc0b7fd8987bbf26c617df66c8d 100644 (file)
@@ -129,7 +129,7 @@ static const struct xscale_reg xscale_reg_arch_info[] = {
 /* convenience wrapper to access XScale specific registers */
 static int xscale_set_reg_u32(struct reg *reg, uint32_t value)
 {
-       uint8_t buf[4];
+       uint8_t buf[4] = { 0 };
 
        buf_set_u32(buf, 0, 32, value);
 
@@ -154,9 +154,9 @@ static int xscale_jtag_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_s
 
        if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) {
                struct scan_field field;
-               uint8_t scratch[4];
+               uint8_t scratch[4] = { 0 };
 
-               memset(&field, 0, sizeof field);
+               memset(&field, 0, sizeof(field));
                field.num_bits = tap->ir_length;
                field.out_value = scratch;
                buf_set_u32(scratch, 0, field.num_bits, new_instr);
@@ -186,7 +186,7 @@ static int xscale_read_dcsr(struct target *target)
        buf_set_u32(&field0, 1, 1, xscale->hold_rst);
        buf_set_u32(&field0, 2, 1, xscale->external_debug_break);
 
-       memset(&fields, 0, sizeof fields);
+       memset(&fields, 0, sizeof(fields));
 
        fields[0].num_bits = 3;
        fields[0].out_value = &field0;
@@ -259,7 +259,7 @@ static int xscale_receive(struct target *target, uint32_t *buffer, int num_words
        path[1] = TAP_DRCAPTURE;
        path[2] = TAP_DRSHIFT;
 
-       memset(&fields, 0, sizeof fields);
+       memset(&fields, 0, sizeof(fields));
 
        fields[0].num_bits = 3;
        uint8_t tmp;
@@ -367,7 +367,7 @@ static int xscale_read_tx(struct target *target, int consume)
        noconsume_path[4] = TAP_DREXIT2;
        noconsume_path[5] = TAP_DRSHIFT;
 
-       memset(&fields, 0, sizeof fields);
+       memset(&fields, 0, sizeof(fields));
 
        fields[0].num_bits = 3;
        fields[0].in_value = &field0_in;
@@ -442,7 +442,7 @@ static int xscale_write_rx(struct target *target)
                XSCALE_DBGRX << xscale->xscale_variant,
                TAP_IDLE);
 
-       memset(&fields, 0, sizeof fields);
+       memset(&fields, 0, sizeof(fields));
 
        fields[0].num_bits = 3;
        fields[0].out_value = &field0_out;
@@ -514,7 +514,7 @@ static int xscale_send(struct target *target, const uint8_t *buffer, int count,
                TAP_IDLE);
 
        static const uint8_t t0;
-       uint8_t t1[4];
+       uint8_t t1[4] = { 0 };
        static const uint8_t t2 = 1;
        struct scan_field fields[3] = {
                        { .num_bits = 3, .out_value = &t0 },
@@ -598,7 +598,7 @@ static int xscale_write_dcsr(struct target *target, int hold_rst, int ext_dbg_br
        buf_set_u32(&field0, 1, 1, xscale->hold_rst);
        buf_set_u32(&field0, 2, 1, xscale->external_debug_break);
 
-       memset(&fields, 0, sizeof fields);
+       memset(&fields, 0, sizeof(fields));
 
        fields[0].num_bits = 3;
        fields[0].out_value = &field0;
@@ -645,8 +645,8 @@ static unsigned int parity(unsigned int v)
 static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8])
 {
        struct xscale_common *xscale = target_to_xscale(target);
-       uint8_t packet[4];
-       uint8_t cmd;
+       uint8_t packet[4] = { 0 };
+       uint8_t cmd = 0;
        int word;
        struct scan_field fields[2];
 
@@ -666,7 +666,7 @@ static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8]
        /* virtual address of desired cache line */
        buf_set_u32(packet, 0, 27, va >> 5);
 
-       memset(&fields, 0, sizeof fields);
+       memset(&fields, 0, sizeof(fields));
 
        fields[0].num_bits = 6;
        fields[0].out_value = &cmd;
@@ -699,8 +699,8 @@ static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8]
 static int xscale_invalidate_ic_line(struct target *target, uint32_t va)
 {
        struct xscale_common *xscale = target_to_xscale(target);
-       uint8_t packet[4];
-       uint8_t cmd;
+       uint8_t packet[4] = { 0 };
+       uint8_t cmd = 0;
        struct scan_field fields[2];
 
        xscale_jtag_set_instr(target->tap,
@@ -713,7 +713,7 @@ static int xscale_invalidate_ic_line(struct target *target, uint32_t va)
        /* virtual address of desired cache line */
        buf_set_u32(packet, 0, 27, va >> 5);
 
-       memset(&fields, 0, sizeof fields);
+       memset(&fields, 0, sizeof(fields));
 
        fields[0].num_bits = 6;
        fields[0].out_value = &cmd;
@@ -824,7 +824,7 @@ static int xscale_poll(struct target *target)
                        retval = xscale_debug_entry(target);
                } else if (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
                        LOG_USER("error while polling TX register, reset CPU");
-                       /* here we "lie" so GDB won't get stuck and a reset can be perfomed */
+                       /* here we "lie" so GDB won't get stuck and a reset can be performed */
                        target->state = TARGET_HALTED;
                }
 
@@ -955,7 +955,7 @@ static int xscale_debug_entry(struct target *target)
                        xscale->arch_debug_reason = XSCALE_DBG_REASON_GENERIC;
                        pc -= 4;
                        break;
-               case 0x5:       /* Vector trap occured */
+               case 0x5:       /* Vector trap occurred */
                        target->debug_reason = DBG_REASON_BREAKPOINT;
                        xscale->arch_debug_reason = XSCALE_DBG_REASON_GENERIC;
                        pc -= 4;
@@ -1110,8 +1110,7 @@ static void xscale_free_trace_data(struct xscale_common *xscale)
        struct xscale_trace_data *td = xscale->trace.data;
        while (td) {
                struct xscale_trace_data *next_td = td->next;
-               if (td->entries)
-                       free(td->entries);
+               free(td->entries);
                free(td);
                td = next_td;
        }
@@ -1551,7 +1550,7 @@ static int xscale_deassert_reset(struct target *target)
                 * coprocessors, trace data, etc.
                 */
                address = xscale->handler_address;
-               for (unsigned binary_size = sizeof xscale_debug_handler;
+               for (unsigned binary_size = sizeof(xscale_debug_handler);
                        binary_size > 0;
                        binary_size -= buf_cnt, buffer += buf_cnt) {
                        uint32_t cache_line[8];
@@ -2412,7 +2411,7 @@ static int xscale_get_reg(struct reg *reg)
        } else if (strcmp(reg->name, "XSCALE_TXRXCTRL") == 0) {
                /* can't (explicitly) read from TXRXCTRL register */
                return ERROR_OK;
-       } else {/* Other DBG registers have to be transfered by the debug handler
+       } else {/* Other DBG registers have to be transferred by the debug handler
                 * send CP read request (command 0x40) */
                xscale_send_u32(target, 0x40);
 
@@ -2450,7 +2449,7 @@ static int xscale_set_reg(struct reg *reg, uint8_t *buf)
        } else if (strcmp(reg->name, "XSCALE_TXRXCTRL") == 0) {
                /* can't (explicitly) write to TXRXCTRL register */
                return ERROR_OK;
-       } else {/* Other DBG registers have to be transfered by the debug handler
+       } else {/* Other DBG registers have to be transferred by the debug handler
                 * send CP write request (command 0x41) */
                xscale_send_u32(target, 0x41);
 
@@ -2583,7 +2582,6 @@ static int xscale_read_instruction(struct target *target, uint32_t pc,
        struct arm_instruction *instruction)
 {
        struct xscale_common *const xscale = target_to_xscale(target);
-       int i;
        int section = -1;
        size_t size_read;
        uint32_t opcode;
@@ -2593,7 +2591,7 @@ static int xscale_read_instruction(struct target *target, uint32_t pc,
                return ERROR_TRACE_IMAGE_UNAVAILABLE;
 
        /* search for the section the current instruction belongs to */
-       for (i = 0; i < xscale->trace.image->num_sections; i++) {
+       for (unsigned int i = 0; i < xscale->trace.image->num_sections; i++) {
                if ((xscale->trace.image->sections[i].base_address <= pc) &&
                        (xscale->trace.image->sections[i].base_address +
                        xscale->trace.image->sections[i].size > pc)) {
@@ -2809,7 +2807,7 @@ static int xscale_analyze_trace(struct target *target, struct command_invocation
                                                current_pc = chkpt_reg;
                                        else if (current_pc != chkpt_reg)       /* sanity check */
                                                LOG_WARNING("trace is suspect: checkpoint register "
-                                                       "inconsistent with adddress from image");
+                                                       "inconsistent with address from image");
                                }
 
                                if (current_pc == 0)
@@ -2903,6 +2901,21 @@ static void xscale_build_reg_cache(struct target *target)
        xscale->reg_cache = (*cache_p);
 }
 
+static void xscale_free_reg_cache(struct target *target)
+{
+       struct xscale_common *xscale = target_to_xscale(target);
+       struct reg_cache *cache = xscale->reg_cache;
+
+       for (unsigned int i = 0; i < ARRAY_SIZE(xscale_reg_arch_info); i++)
+               free(cache->reg_list[i].value);
+
+       free(cache->reg_list[0].arch_info);
+       free(cache->reg_list);
+       free(cache);
+
+       arm_free_reg_cache(&xscale->arm);
+}
+
 static int xscale_init_target(struct command_context *cmd_ctx,
        struct target *target)
 {
@@ -2910,6 +2923,14 @@ static int xscale_init_target(struct command_context *cmd_ctx,
        return ERROR_OK;
 }
 
+static void xscale_deinit_target(struct target *target)
+{
+       struct xscale_common *xscale = target_to_xscale(target);
+
+       xscale_free_reg_cache(target);
+       free(xscale);
+}
+
 static int xscale_init_arch_info(struct target *target,
        struct xscale_common *xscale, struct jtag_tap *tap)
 {
@@ -2919,7 +2940,7 @@ static int xscale_init_arch_info(struct target *target,
 
        arm = &xscale->arm;
 
-       /* store architecture specfic data */
+       /* store architecture specific data */
        xscale->common_magic = XSCALE_COMMON_MAGIC;
 
        /* PXA3xx with 11 bit IR shifts the JTAG instructions */
@@ -2981,7 +3002,7 @@ static int xscale_init_arch_info(struct target *target,
 
        /* prepare ARMv4/5 specific information */
        arm->arch_info = xscale;
-       arm->core_type = ARM_MODE_ANY;
+       arm->core_type = ARM_CORE_TYPE_STD;
        arm->read_core_reg = xscale_read_core_reg;
        arm->write_core_reg = xscale_write_core_reg;
        arm->full_context = xscale_full_context;
@@ -3004,7 +3025,7 @@ static int xscale_target_create(struct target *target, Jim_Interp *interp)
 {
        struct xscale_common *xscale;
 
-       if (sizeof xscale_debug_handler > 0x800) {
+       if (sizeof(xscale_debug_handler) > 0x800) {
                LOG_ERROR("debug_handler.bin: larger than 2kb");
                return ERROR_FAIL;
        }
@@ -3406,15 +3427,15 @@ COMMAND_HANDLER(xscale_handle_trace_image_command)
        }
 
        xscale->trace.image = malloc(sizeof(struct image));
-       xscale->trace.image->base_address_set = 0;
-       xscale->trace.image->start_address_set = 0;
+       xscale->trace.image->base_address_set = false;
+       xscale->trace.image->start_address_set = false;
 
        /* a base address isn't always necessary, default to 0x0 (i.e. don't relocate) */
        if (CMD_ARGC >= 2) {
-               xscale->trace.image->base_address_set = 1;
+               xscale->trace.image->base_address_set = true;
                COMMAND_PARSE_NUMBER(llong, CMD_ARGV[1], xscale->trace.image->base_address);
        } else
-               xscale->trace.image->base_address_set = 0;
+               xscale->trace.image->base_address_set = false;
 
        if (image_open(xscale->trace.image, CMD_ARGV[0],
                (CMD_ARGC >= 3) ? CMD_ARGV[2] : NULL) != ERROR_OK) {
@@ -3725,6 +3746,7 @@ struct target_type xscale_target = {
        .commands = xscale_command_handlers,
        .target_create = xscale_target_create,
        .init_target = xscale_init_target,
+       .deinit_target = xscale_deinit_target,
 
        .virt2phys = xscale_virt2phys,
        .mmu = xscale_mmu

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)