return ERROR_INVALID_ARGUMENTS;
}
- LOG_USER("target halted in %s state due to %s, current mode: %s\n"
- "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
- "MMU: %s, D-Cache: %s, I-Cache: %s"
- "%s",
- arm_state_strings[armv4_5->core_state],
- Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name ,
- arm_mode_name(armv4_5->core_mode),
- buf_get_u32(armv4_5->cpsr->value, 0, 32),
- buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
+ arm_arch_state(target);
+ LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s%s",
state[xscale->armv4_5_mmu.mmu_enabled],
state[xscale->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
state[xscale->armv4_5_mmu.armv4_5_cache.i_cache_enabled],
xscale_write_dcsr(target, 1, 0);
/* select BYPASS, because having DCSR selected caused problems on the PXA27x */
- xscale_jtag_set_instr(target->tap, 0x7f);
+ xscale_jtag_set_instr(target->tap, ~0);
jtag_execute_queue();
/* assert reset */
static int xscale_read_phys_memory(struct target *target, uint32_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
- /** \todo: provide a non-stub implementtion of this routine. */
+ struct xscale_common *xscale = target_to_xscale(target);
+
+ /* with MMU inactive, there are only physical addresses */
+ if (!xscale->armv4_5_mmu.mmu_enabled)
+ return xscale_read_memory(target, address, size, count, buffer);
+
+ /** \todo: provide a non-stub implementation of this routine. */
LOG_ERROR("%s: %s is not implemented. Disable MMU?",
target_name(target), __func__);
return ERROR_FAIL;
static int xscale_write_phys_memory(struct target *target, uint32_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
- /** \todo: provide a non-stub implementtion of this routine. */
+ struct xscale_common *xscale = target_to_xscale(target);
+
+ /* with MMU inactive, there are only physical addresses */
+ if (!xscale->armv4_5_mmu.mmu_enabled)
+ return xscale_read_memory(target, address, size, count, buffer);
+
+ /** \todo: provide a non-stub implementation of this routine. */
LOG_ERROR("%s: %s is not implemented. Disable MMU?",
target_name(target), __func__);
return ERROR_FAIL;
xscale->dbr0_used = 0;
xscale->dbr1_used = 0;
+ LOG_INFO("%s: hardware has 2 breakpoints and 2 watchpoints",
+ target_name(target));
+
xscale->arm_bkpt = ARMV5_BKPT(0x0);
xscale->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
.deassert_reset = xscale_deassert_reset,
.soft_reset_halt = NULL,
+ /* REVISIT on some cores, allow exporting iwmmxt registers ... */
.get_gdb_reg_list = arm_get_gdb_reg_list,
.read_memory = xscale_read_memory,