#include "mips32.h"
#include "mips_m4k.h"
#include "mips32_dmaacc.h"
+#include "target_type.h"
/* cli handling */
u32 ejtag_ctrl = ejtag_info->ejtag_ctrl;
/* read ejtag control reg */
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
{
/* we have detected a reset, clear flag
* otherwise ejtag will not work */
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_ROCC;
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
{
if ((target->state == TARGET_RUNNING) || (target->state == TARGET_RESET))
{
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
target->state = TARGET_HALTED;
if (target->reset_halt)
{
/* use hardware to catch reset */
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT, NULL);
}
else
{
- jtag_add_end_state(TAP_IDLE);
+ jtag_set_end_state(TAP_IDLE);
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
}
}
if (current_instr == MIPS32_SDBBP)
{
- if((retval = target->type->write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
+ if((retval = target_write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
{
return retval;
}
if (current_instr == MIPS16_SDBBP)
{
- if((retval = target->type->write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
+ if((retval = target_write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
{
return retval;
}
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
u32 idcode = 0;
- if (!target->type->examined)
+ if (!target_was_examined(target))
{
- mips_ejtag_get_idcode(ejtag_info, &idcode, NULL);
+ mips_ejtag_get_idcode(ejtag_info, &idcode);
ejtag_info->idcode = idcode;
if (((idcode >> 1) & 0x7FF) == 0x29)