-//#define MIPS32_PRACC_STACK 0xFF2FFFFC
-#define MIPS32_PRACC_STACK 0xFF204000
-#define MIPS32_PRACC_PARAM_IN 0xFF201000
-#define MIPS32_PRACC_PARAM_IN_SIZE 0x1000
-#define MIPS32_PRACC_PARAM_OUT (MIPS32_PRACC_PARAM_IN + MIPS32_PRACC_PARAM_IN_SIZE)
-#define MIPS32_PRACC_PARAM_OUT_SIZE 0x1000
+#define MIPS32_PRACC_PARAM_OUT 0xFF202000
+
+#define PRACC_UPPER_BASE_ADDR (MIPS32_PRACC_BASE_ADDR >> 16)
+#define PRACC_MAX_CODE (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_TEXT)
+#define PRACC_MAX_INSTRUCTIONS (PRACC_MAX_CODE / 4)
+#define PRACC_OUT_OFFSET (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_BASE_ADDR)
+
+#define MIPS32_FASTDATA_HANDLER_SIZE 0x80
+#define UPPER16(addr) ((addr) >> 16)
+#define LOWER16(addr) ((addr) & 0xFFFF)
+#define NEG16(v) (((~(v)) + 1) & 0xFFFF)
+#define SWAP16(v) ((LOWER16(v) << 16) | (UPPER16(v)))
+/*#define NEG18(v) (((~(v)) + 1) & 0x3FFFF)*/
+
+#define PRACC_BLOCK 128 /* 1 Kbyte */
+
+typedef struct {
+ uint32_t instr;
+ uint32_t addr;
+} pa_list;
+
+struct pracc_queue_info {
+ struct mips_ejtag *ejtag_info;
+ unsigned isa;
+ int retval;
+ int code_count;
+ int store_count;
+ int max_code; /* max intstructions with currently allocated memory */
+ pa_list *pracc_list; /* Code and store addresses at dmseg */
+};
+
+void pracc_queue_init(struct pracc_queue_info *ctx);
+void pracc_add(struct pracc_queue_info *ctx, uint32_t addr, uint32_t instr);
+void pracc_add_li32(struct pracc_queue_info *ctx, uint32_t reg_num, uint32_t data, bool optimize);
+void pracc_queue_free(struct pracc_queue_info *ctx);
+int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info,
+ struct pracc_queue_info *ctx, uint32_t *buf, bool check_last);