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Paulius Zaleckas <paulius.zaleckas@gmail.com>:
[openocd.git] / src / target / mips32_dmaacc.c
diff --git a/src/target/mips32_dmaacc.c b/src/target/mips32_dmaacc.c
index 6440f948871d9d498468099b7824085453abdf17..9194bf6176f6070c1e7520c3f63d0c86a48ad7ee 100644 (file)
--- a/src/target/mips32_dmaacc.c
+++ b/src/target/mips32_dmaacc.c
@@ -26,11 +26,9 @@
 #include "config.h"
 #endif
 
-#include <string.h>
-#include "log.h"
-#include "mips32.h"
 #include "mips32_dmaacc.h"
 
+
 /*
  * The following logic shamelessly cloned from HairyDairyMaid's wrt54g_debrick
  * to support the Broadcom BCM5352 SoC in the Linksys WRT54GL wireless router
@@ -41,10 +39,10 @@
  * displaying/modifying memory and memory mapped registers.
  */
 
-static int ejtag_dma_read(mips_ejtag_t *ejtag_info, u32 addr, u32 *data)
+static int ejtag_dma_read(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t *data)
 {
-       u32 v;
-       u32 ejtag_ctrl;
+       uint32_t v;
+       uint32_t ejtag_ctrl;
        int retries = RETRY_ATTEMPTS;
 
 begin_ejtag_dma_read:
@@ -87,10 +85,10 @@ begin_ejtag_dma_read:
        return ERROR_OK;
 }
 
-static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, u32 addr, u16 *data)
+static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, uint32_t addr, uint16_t *data)
 {
-       u32 v;
-       u32 ejtag_ctrl;
+       uint32_t v;
+       uint32_t ejtag_ctrl;
        int retries = RETRY_ATTEMPTS;
 
 begin_ejtag_dma_read_h:
@@ -139,10 +137,10 @@ begin_ejtag_dma_read_h:
        return ERROR_OK;
 }
 
-static int ejtag_dma_read_b(mips_ejtag_t *ejtag_info, u32 addr, u8 *data)
+static int ejtag_dma_read_b(mips_ejtag_t *ejtag_info, uint32_t addr, uint8_t *data)
 {
-       u32 v;
-       u32 ejtag_ctrl;
+       uint32_t v;
+       uint32_t ejtag_ctrl;
        int retries = RETRY_ATTEMPTS;
 
 begin_ejtag_dma_read_b:
@@ -182,7 +180,7 @@ begin_ejtag_dma_read_b:
                return ERROR_JTAG_DEVICE_ERROR;
        }
 
-       // Handle the bigendian/littleendian
+       /* Handle the bigendian/littleendian */
        switch (addr & 0x3) {
                case 0:
                        *data = v & 0xff;
@@ -201,10 +199,10 @@ begin_ejtag_dma_read_b:
        return ERROR_OK;
 }
 
-static int ejtag_dma_write(mips_ejtag_t *ejtag_info, u32 addr, u32 data)
+static int ejtag_dma_write(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
 {
-       u32 v;
-       u32 ejtag_ctrl;
+       uint32_t v;
+       uint32_t ejtag_ctrl;
        int retries = RETRY_ATTEMPTS;
 
 begin_ejtag_dma_write:
@@ -248,10 +246,10 @@ begin_ejtag_dma_write:
        return ERROR_OK;
 }
 
-static int ejtag_dma_write_h(mips_ejtag_t *ejtag_info, u32 addr, u32 data)
+static int ejtag_dma_write_h(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
 {
-       u32 v;
-       u32 ejtag_ctrl;
+       uint32_t v;
+       uint32_t ejtag_ctrl;
        int retries = RETRY_ATTEMPTS;
 
        /* Handle the bigendian/littleendian */
@@ -299,10 +297,10 @@ begin_ejtag_dma_write_h:
        return ERROR_OK;
 }
 
-static int ejtag_dma_write_b(mips_ejtag_t *ejtag_info, u32 addr, u32 data)
+static int ejtag_dma_write_b(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
 {
-       u32 v;
-       u32 ejtag_ctrl;
+       uint32_t v;
+       uint32_t ejtag_ctrl;
        int retries = RETRY_ATTEMPTS;
 
        /* Handle the bigendian/littleendian */
@@ -351,22 +349,22 @@ begin_ejtag_dma_write_b:
        return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf)
+int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf)
 {
        switch (size)
        {
                case 1:
-                       return mips32_dmaacc_read_mem8(ejtag_info, addr, count, (u8*)buf);
+                       return mips32_dmaacc_read_mem8(ejtag_info, addr, count, (uint8_t*)buf);
                case 2:
-                       return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (u16*)buf);
+                       return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (uint16_t*)buf);
                case 4:
-                       return mips32_dmaacc_read_mem32(ejtag_info, addr, count, (u32*)buf);
+                       return mips32_dmaacc_read_mem32(ejtag_info, addr, count, (uint32_t*)buf);
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf)
+int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf)
 {
        int i;
        int     retval;
@@ -379,7 +377,7 @@ int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32
        return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf)
+int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf)
 {
        int i;
        int retval;
@@ -392,7 +390,7 @@ int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16
        return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *buf)
+int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf)
 {
        int i;
        int retval;
@@ -405,22 +403,22 @@ int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *b
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf)
+int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf)
 {
        switch (size)
        {
                case 1:
-                       return mips32_dmaacc_write_mem8(ejtag_info, addr, count, (u8*)buf);
+                       return mips32_dmaacc_write_mem8(ejtag_info, addr, count, (uint8_t*)buf);
                case 2:
-                       return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(u16*)buf);
+                       return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(uint16_t*)buf);
                case 4:
-                       return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (u32*)buf);
+                       return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (uint32_t*)buf);
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf)
+int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf)
 {
        int i;
        int retval;
@@ -433,7 +431,7 @@ int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf)
+int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf)
 {
        int i;
        int retval;
@@ -446,7 +444,7 @@ int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *buf)
+int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf)
 {
        int i;
        int retval;
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