mips32: add per-cpu quirks feature

[openocd.git] / src / target / mips32.h

diff --git a/src/target/mips32.h b/src/target/mips32.h
index 81b6d649d82aa6fb4c789c6512d813ee679dbb70..3d03e98c58275f02ae7c46a9a94904aa5716a418 100644 (file)
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -13,6 +13,8 @@
 #ifndef OPENOCD_TARGET_MIPS32_H
 #define OPENOCD_TARGET_MIPS32_H
 
+#include <helper/bits.h>
+
 #include "target.h"
 #include "mips32_pracc.h"
 
@@ -55,6 +57,9 @@
 
 #define MIPS32_SCAN_DELAY_LEGACY_MODE 2000000
 
+/* Insert extra NOPs after the DRET instruction on exit from debug. */
+#define        EJTAG_QUIRK_PAD_DRET            BIT(0)
+
 /* offsets into mips32 core register cache */
 enum {
        MIPS32_PC = 37,
@@ -91,6 +96,11 @@ struct mips32_common {
        enum mips32_isa_mode isa_mode;
        enum mips32_isa_imp isa_imp;
 
+       /* processor identification register */
+       uint32_t prid;
+       /* CPU specific quirks */
+       uint32_t cpu_quirks;
+
        /* working area for fastdata access */
        struct working_area *fast_data_area;
 
@@ -408,6 +418,8 @@ int mips32_enable_interrupts(struct target *target, int enable);
 
 int mips32_examine(struct target *target);
 
+int mips32_cpu_probe(struct target *target);
+
 int mips32_read_config_regs(struct target *target);
 
 int mips32_register_commands(struct command_context *cmd_ctx);