cortex_m3: use armv7m's async algorithm implementation

[openocd.git] / src / target / etm.h

diff --git a/src/target/etm.h b/src/target/etm.h
index c8da794768be7460badefcd155efe5d9a6769462..4224de675b9ad58fab41cfb0b8acd789a2bf47a5 100644 (file)
--- a/src/target/etm.h
+++ b/src/target/etm.h
@@ -78,9 +78,23 @@ struct etm_reg
        struct arm_jtag *jtag_info;
 };
 
-typedef enum
+/* Subset of ETM_CTRL bit assignments.  Many of these
+ * control the configuration of trace output, which
+ * hooks up either to ETB or to an external device.
+ *
+ * NOTE that these have evolved since the ~v1.3 defns ...
+ */
+enum
 {
-       /* Port width */
+       ETM_CTRL_POWERDOWN      = (1 << 0),
+       ETM_CTRL_MONITOR_CPRT   = (1 << 1),
+
+       /* bits 3:2 == trace type */
+       ETM_CTRL_TRACE_DATA     = (1 << 2),
+       ETM_CTRL_TRACE_ADDR     = (2 << 2),
+       ETM_CTRL_TRACE_MASK     = (3 << 2),
+
+       /* Port width (bits 21 and 6:4) */
        ETM_PORT_4BIT           = 0x00,
        ETM_PORT_8BIT           = 0x10,
        ETM_PORT_16BIT          = 0x20,
@@ -91,41 +105,41 @@ typedef enum
        ETM_PORT_1BIT           = 0x00 | (1 << 21),
        ETM_PORT_2BIT           = 0x10 | (1 << 21),
        ETM_PORT_WIDTH_MASK     = 0x70 | (1 << 21),
-       /* Port modes */
-       ETM_PORT_NORMAL    = 0x00000,
-       ETM_PORT_MUXED     = 0x10000,
-       ETM_PORT_DEMUXED   = 0x20000,
-       ETM_PORT_MODE_MASK = 0x30000,
-       /* Clocking modes */
-       ETM_PORT_FULL_CLOCK = 0x0000,
-       ETM_PORT_HALF_CLOCK = 0x1000,
-       ETM_PORT_CLOCK_MASK = 0x1000,
-} etm_portmode_t;
 
-typedef enum
-{
-       /* Data trace */
-       ETMV1_TRACE_NONE         = 0x00,
-       ETMV1_TRACE_DATA     = 0x01,
-       ETMV1_TRACE_ADDR     = 0x02,
-       ETMV1_TRACE_MASK     = 0x03,
-       /* ContextID */
-       ETMV1_CONTEXTID_NONE = 0x00,
-       ETMV1_CONTEXTID_8    = 0x10,
-       ETMV1_CONTEXTID_16   = 0x20,
-       ETMV1_CONTEXTID_32   = 0x30,
-       ETMV1_CONTEXTID_MASK = 0x30,
-       /* Misc */
-       ETMV1_CYCLE_ACCURATE = 0x100,
-       ETMV1_BRANCH_OUTPUT = 0x200
-} etmv1_tracemode_t;
+       ETM_CTRL_FIFOFULL_STALL = (1 << 7),
+       ETM_CTRL_BRANCH_OUTPUT  = (1 << 8),
+       ETM_CTRL_DBGRQ          = (1 << 9),
+       ETM_CTRL_ETM_PROG       = (1 << 10),
+       ETM_CTRL_ETMEN          = (1 << 11),
+       ETM_CTRL_CYCLE_ACCURATE = (1 << 12),
+
+       /* Clocking modes -- up to v2.1, bit 13 */
+       ETM_PORT_FULL_CLOCK     = (0 << 13),
+       ETM_PORT_HALF_CLOCK     = (1 << 13),
+       ETM_PORT_CLOCK_MASK     = (1 << 13),
+
+       // bits 15:14 == context ID size used in tracing
+       ETM_CTRL_CONTEXTID_NONE = (0 << 14),
+       ETM_CTRL_CONTEXTID_8    = (1 << 14),
+       ETM_CTRL_CONTEXTID_16   = (2 << 14),
+       ETM_CTRL_CONTEXTID_32   = (3 << 14),
+       ETM_CTRL_CONTEXTID_MASK = (3 << 14),
+
+       /* Port modes -- bits 17:16, tied to clocking mode */
+       ETM_PORT_NORMAL         = (0 << 16),
+       ETM_PORT_MUXED          = (1 << 16),
+       ETM_PORT_DEMUXED        = (2 << 16),
+       ETM_PORT_MODE_MASK      = (3 << 16),
+
+       // bits 31:18 defined in v3.0 and later (e.g. ARM11+)
+};
 
 /* forward-declare ETM context */
 struct etm_context;
 
 struct etm_capture_driver
 {
-       char *name;
+       const char *name;
        const struct command_registration *commands;
        int (*init)(struct etm_context *etm_ctx);
        trace_status_t (*status)(struct etm_context *etm_ctx);
@@ -158,13 +172,11 @@ struct etm_context
        struct reg_cache *reg_cache;            /* ETM register cache */
        struct etm_capture_driver *capture_driver;      /* driver used to access ETM data */
        void *capture_driver_priv;      /* capture driver private data */
-       uint32_t trigger_percent;       /* how much trace buffer to fill after trigger */
        trace_status_t capture_status;  /* current state of capture run */
        struct etmv1_trace_data *trace_data;    /* trace data */
        uint32_t trace_depth;           /* number of cycles to be analyzed, 0 if no data available */
-       etm_portmode_t portmode;        /* normal, multiplexed or demultiplexed */
-       etmv1_tracemode_t tracemode;    /* type of info trace contains */
-       int /*armv4_5_state_t*/ core_state;     /* current core state */
+       uint32_t control;       /* shadow of ETM_CTRL */
+       int /*arm_state*/ core_state;   /* current core state */
        struct image *image;            /* source for target opcodes */
        uint32_t pipe_index;            /* current trace cycle */
        uint32_t data_index;            /* cycle holding next data packet */