- added manpage for OpenOCD (thanks to Uwe Hermann)

[openocd.git] / src / target / etm.h

diff --git a/src/target/etm.h b/src/target/etm.h
index 65fd757c8d3971b117f11150d7250162d5cfefcd..0b7b05addb7b494dc5ba821fc76cc6daafe5c213 100644 (file)
--- a/src/target/etm.h
+++ b/src/target/etm.h
@@ -120,11 +120,17 @@ typedef struct etm_capture_driver_s
        int (*stop_capture)(struct etm_context_s *etm_ctx);\r
 } etm_capture_driver_t;\r
 \r
+enum\r
+{\r
+       ETMV1_TRACESYNC_CYCLE = 0x1,\r
+       ETMV1_TRIGGER_CYCLE = 0x2,\r
+};\r
+\r
 typedef struct etmv1_trace_data_s\r
 {\r
-       u8 pipestat;    /* pipeline cycle this packet belongs to */\r
-       u16 packet;     /* packet data (4, 8 or 16 bit) */\r
-       int tracesync;  /* 1 if tracesync was set on this packet */\r
+       u8 pipestat;    /* bits 0-2 pipeline status */\r
+       u16 packet;             /* packet data (4, 8 or 16 bit) */\r
+       int flags;              /* ETMV1_TRACESYNC_CYCLE, ETMV1_TRIGGER_CYCLE */\r
 } etmv1_trace_data_t;\r
 \r
 /* describe a trace context\r
@@ -134,6 +140,7 @@ typedef struct etmv1_trace_data_s
  */\r
 typedef struct etm_context_s\r
 {\r
+       target_t *target;                               /* target this ETM is connected to */\r
        reg_cache_t *reg_cache;                 /* ETM register cache */\r
        etm_capture_driver_t *capture_driver;   /* driver used to access ETM data */\r
        void *capture_driver_priv;              /* capture driver private data */\r
@@ -143,13 +150,16 @@ typedef struct etm_context_s
        etm_portmode_t portmode;                /* normal, multiplexed or demultiplexed */\r
        etmv1_tracemode_t tracemode;    /* type of information the trace contains (data, addres, contextID, ...) */ \r
        armv4_5_state_t core_state;             /* current core state (ARM, Thumb, Jazelle) */\r
-       image_t image;                                  /* source for target opcodes */\r
+       image_t *image;                                 /* source for target opcodes */\r
        u32 pipe_index;                                 /* current trace cycle */\r
        u32 data_index;                                 /* cycle holding next data packet */\r
+       int data_half;                                  /* port half on a 16 bit port */\r
        u32 current_pc;                                 /* current program counter */\r
        u32 pc_ok;                                              /* full PC has been acquired */\r
        u32 last_branch;                                /* last branch address output */ \r
+       u32 last_branch_reason;                 /* branch reason code for the last branch encountered */\r
        u32 last_ptr;                                   /* address of the last data access */\r
+       u32 ptr_ok;                                             /* whether last_ptr is valid */ \r
        u32 context_id;                                 /* context ID of the code being traced */\r
 } etm_context_t;\r
 \r