Revert "cortex_m3: add auto maskisr"
[openocd.git] / src / target / etm.c
index 67dac06fadabb51ed5c16ee102fc113c3700908d..7384764aa1f4f1ed9b46077f898743420fbdd131 100644 (file)
@@ -496,6 +496,7 @@ static int etm_read_reg_w_check(struct reg *reg,
        const struct etm_reg_info *r = etm_reg->reg_info;
        uint8_t reg_addr = r->addr & 0x7f;
        struct scan_field fields[3];
+       int retval;
 
        if (etm_reg->reg_info->mode == WO) {
                LOG_ERROR("BUG: can't read write-only register %s", r->name);
@@ -504,9 +505,12 @@ static int etm_read_reg_w_check(struct reg *reg,
 
        LOG_DEBUG("%s (%u)", r->name, reg_addr);
 
-       jtag_set_end_state(TAP_IDLE);
-       arm_jtag_scann(etm_reg->jtag_info, 0x6);
-       arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL);
+       retval = arm_jtag_scann(etm_reg->jtag_info, 0x6, TAP_IDLE);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+       if (retval != ERROR_OK)
+               return retval;
 
        fields[0].num_bits = 32;
        fields[0].out_value = reg->value;
@@ -515,29 +519,28 @@ static int etm_read_reg_w_check(struct reg *reg,
        fields[0].check_mask = NULL;
 
        fields[1].num_bits = 7;
-       fields[1].out_value = malloc(1);
-       buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
+       uint8_t temp1;
+       fields[1].out_value = &temp1;
+       buf_set_u32(&temp1, 0, 7, reg_addr);
        fields[1].in_value = NULL;
        fields[1].check_value = NULL;
        fields[1].check_mask = NULL;
 
        fields[2].num_bits = 1;
-       fields[2].out_value = malloc(1);
-       buf_set_u32(fields[2].out_value, 0, 1, 0);
+       uint8_t temp2;
+       fields[2].out_value = &temp2;
+       buf_set_u32(&temp2, 0, 1, 0);
        fields[2].in_value = NULL;
        fields[2].check_value = NULL;
        fields[2].check_mask = NULL;
 
-       jtag_add_dr_scan(etm_reg->jtag_info->tap, 3, fields, jtag_get_end_state());
+       jtag_add_dr_scan(etm_reg->jtag_info->tap, 3, fields, TAP_IDLE);
 
        fields[0].in_value = reg->value;
        fields[0].check_value = check_value;
        fields[0].check_mask = check_mask;
 
-       jtag_add_dr_scan_check(etm_reg->jtag_info->tap, 3, fields, jtag_get_end_state());
-
-       free(fields[1].out_value);
-       free(fields[2].out_value);
+       jtag_add_dr_scan_check(etm_reg->jtag_info->tap, 3, fields, TAP_IDLE);
 
        return ERROR_OK;
 }
@@ -579,6 +582,7 @@ static int etm_write_reg(struct reg *reg, uint32_t value)
        const struct etm_reg_info *r = etm_reg->reg_info;
        uint8_t reg_addr = r->addr & 0x7f;
        struct scan_field fields[3];
+       int retval;
 
        if (etm_reg->reg_info->mode == RO) {
                LOG_ERROR("BUG: can't write read--only register %s", r->name);
@@ -587,29 +591,32 @@ static int etm_write_reg(struct reg *reg, uint32_t value)
 
        LOG_DEBUG("%s (%u): 0x%8.8" PRIx32 "", r->name, reg_addr, value);
 
-       jtag_set_end_state(TAP_IDLE);
-       arm_jtag_scann(etm_reg->jtag_info, 0x6);
-       arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL);
+       retval = arm_jtag_scann(etm_reg->jtag_info, 0x6, TAP_IDLE);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+       if (retval != ERROR_OK)
+               return retval;
 
        fields[0].num_bits = 32;
        uint8_t tmp1[4];
        fields[0].out_value = tmp1;
-       buf_set_u32(fields[0].out_value, 0, 32, value);
+       buf_set_u32(tmp1, 0, 32, value);
        fields[0].in_value = NULL;
 
        fields[1].num_bits = 7;
        uint8_t tmp2;
        fields[1].out_value = &tmp2;
-       buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
+       buf_set_u32(&tmp2, 0, 7, reg_addr);
        fields[1].in_value = NULL;
 
        fields[2].num_bits = 1;
        uint8_t tmp3;
        fields[2].out_value = &tmp3;
-       buf_set_u32(fields[2].out_value, 0, 1, 1);
+       buf_set_u32(&tmp3, 0, 1, 1);
        fields[2].in_value = NULL;
 
-       jtag_add_dr_scan(etm_reg->jtag_info->tap, 3, fields, jtag_get_end_state());
+       jtag_add_dr_scan(etm_reg->jtag_info->tap, 3, fields, TAP_IDLE);
 
        return ERROR_OK;
 }
@@ -662,7 +669,7 @@ static int etm_read_instruction(struct etm_context *ctx, struct arm_instruction
                        ctx->current_pc - ctx->image->sections[section].base_address,
                        4, buf, &size_read)) != ERROR_OK)
                {
-                       LOG_ERROR("error while reading instruction: %i", retval);
+                       LOG_ERROR("error while reading instruction");
                        return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
                }
                opcode = target_buffer_get_u32(ctx->target, buf);
@@ -675,7 +682,7 @@ static int etm_read_instruction(struct etm_context *ctx, struct arm_instruction
                        ctx->current_pc - ctx->image->sections[section].base_address,
                        2, buf, &size_read)) != ERROR_OK)
                {
-                       LOG_ERROR("error while reading instruction: %i", retval);
+                       LOG_ERROR("error while reading instruction");
                        return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
                }
                opcode = target_buffer_get_u16(ctx->target, buf);
@@ -885,6 +892,11 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_context *
        if (ctx->trace_depth == 0)
                ctx->capture_driver->read_trace(ctx);
 
+       if (ctx->trace_depth == 0) {
+               command_print(cmd_ctx, "Trace is empty.");
+               return ERROR_OK;
+       }
+
        /* start at the beginning of the captured trace */
        ctx->pipe_index = 0;
        ctx->data_index = 0;
@@ -1885,7 +1897,15 @@ COMMAND_HANDLER(handle_etm_load_command)
                return ERROR_FAIL;
        }
 
-       if (file.size % 4)
+       int filesize;
+       int retval = fileio_size(&file, &filesize);
+       if (retval != ERROR_OK)
+       {
+               fileio_close(&file);
+               return retval;
+       }
+
+       if (filesize % 4)
        {
                command_print(CMD_CTX, "size isn't a multiple of 4, no valid trace data");
                fileio_close(&file);
@@ -2089,6 +2109,7 @@ COMMAND_HANDLER(handle_etm_analyze_command)
 
        if ((retval = etmv1_analyze_trace(etm_ctx, CMD_CTX)) != ERROR_OK)
        {
+               /* FIX! error should be reported inside etmv1_analyze_trace() */
                switch (retval)
                {
                        case ERROR_ETM_ANALYSIS_FAILED:
@@ -2101,7 +2122,7 @@ COMMAND_HANDLER(handle_etm_analyze_command)
                                command_print(CMD_CTX, "no image available for trace analysis");
                                break;
                        default:
-                               command_print(CMD_CTX, "unknown error: %i", retval);
+                               command_print(CMD_CTX, "unknown error");
                }
        }
 

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)