int etm_reg_arch_size_info[] =
{
- 32, 32, 17, 8, 3, 9, 32, 17,
- 26, 16, 25, 8, 17, 32, 32, 17,
+ 32, 32, 17, 8, 3, 9, 32, 16,
+ 17, 26, 25, 8, 17, 32, 32, 17,
32, 32, 32, 32, 32, 32, 32, 32,
32, 32, 32, 32, 32, 32, 32, 32,
7, 7, 7, 7, 7, 7, 7, 7,
int etm_get_reg(reg_t *reg);
int etm_set_reg(reg_t *reg, u32 value);
+int etm_set_reg_w_exec(reg_t *reg, u8 *buf);
int etm_write_reg(reg_t *reg, u32 value);
int etm_read_reg(reg_t *reg);
jtag_add_end_state(TAP_RTI);
arm_jtag_scann(etm_reg->jtag_info, 0x6);
- arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr);
+ arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL);
fields[0].device = etm_reg->jtag_info->chain_pos;
fields[0].num_bits = 32;
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, -1, NULL);
fields[0].in_value = reg->value;
fields[0].in_check_value = check_value;
fields[0].in_check_mask = check_mask;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, -1, NULL);
free(fields[1].out_value);
free(fields[2].out_value);
return ERROR_OK;
}
-int etm_set_reg_w_exec(reg_t *reg, u32 value)
+int etm_set_reg_w_exec(reg_t *reg, u8 *buf)
{
- etm_set_reg(reg, value);
+ etm_set_reg(reg, buf_get_u32(buf, 0, reg->size));
if (jtag_execute_queue() != ERROR_OK)
{
jtag_add_end_state(TAP_RTI);
arm_jtag_scann(etm_reg->jtag_info, 0x6);
- arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr);
+ arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL);
fields[0].device = etm_reg->jtag_info->chain_pos;
fields[0].num_bits = 32;
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, -1, NULL);
free(fields[0].out_value);
free(fields[1].out_value);