Rename jtag_add_end_state to jtag_set_end_state since "add" implies that

[openocd.git] / src / target / embeddedice.c

diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index 9d2be364dbe11045836d46aa8ceecf1255cb6e94..b61df8b0032f4424fb81412d08cabf0755e4d8fe 100644 (file)
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -184,7 +184,7 @@ reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7
                         * in some unusual bits.  Let feroceon.c validate it
                         * and do the appropriate setup itself.
                         */
-                       if (strcmp(target->type->name, "feroceon") == 0)
+                       if (strcmp(target_get_name(target), "feroceon") == 0)
                                break;
                        LOG_ERROR("unknown EmbeddedICE version (comms ctrl: 0x%8.8x)", buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
        }
@@ -238,7 +238,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        u8 field1_out[1];
        u8 field2_out[1];
 
-       jtag_add_end_state(TAP_IDLE);
+       jtag_set_end_state(TAP_IDLE);
        arm_jtag_scann(ice_reg->jtag_info, 0x2);
 
        arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL);
@@ -266,7 +266,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        fields[2].check_value = NULL;
        fields[2].check_mask = NULL;
 
-       jtag_add_dr_scan(3, fields, TAP_INVALID);
+       jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
        fields[0].in_value = reg->value;
        fields[0].check_value = check_value;
@@ -278,7 +278,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
         */
        buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
 
-       jtag_add_dr_scan_check(3, fields, TAP_INVALID);
+       jtag_add_dr_scan_check(3, fields, jtag_get_end_state());
 
        return ERROR_OK;
 }
@@ -293,7 +293,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
        u8 field1_out[1];
        u8 field2_out[1];
 
-       jtag_add_end_state(TAP_IDLE);
+       jtag_set_end_state(TAP_IDLE);
        arm_jtag_scann(jtag_info, 0x2);
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
@@ -314,7 +314,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
        buf_set_u32(fields[2].out_value, 0, 1, 0);
        fields[2].in_value = NULL;
 
-       jtag_add_dr_scan(3, fields, TAP_INVALID);
+       jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
        while (size > 0)
        {
@@ -325,7 +325,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
                        buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
 
                fields[0].in_value = (u8 *)data;
-               jtag_add_dr_scan(3, fields, TAP_INVALID);
+               jtag_add_dr_scan(3, fields, jtag_get_end_state());
                jtag_add_callback(arm_le_to_h_u32, (u8 *)data);
 
                data++;
@@ -369,7 +369,7 @@ void embeddedice_write_reg(reg_t *reg, u32 value)
 
        LOG_DEBUG("%i: 0x%8.8x", ice_reg->addr, value);
 
-       jtag_add_end_state(TAP_IDLE);
+       jtag_set_end_state(TAP_IDLE);
        arm_jtag_scann(ice_reg->jtag_info, 0x2);
 
        arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL);
@@ -395,7 +395,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
        u8 field1_out[1];
        u8 field2_out[1];
 
-       jtag_add_end_state(TAP_IDLE);
+       jtag_set_end_state(TAP_IDLE);
        arm_jtag_scann(jtag_info, 0x2);
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
@@ -420,7 +420,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
        while (size > 0)
        {
                buf_set_u32(fields[0].out_value, 0, 32, *data);
-               jtag_add_dr_scan(3, fields, TAP_INVALID);
+               jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
                data++;
                size--;
@@ -450,7 +450,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
        else
                return ERROR_INVALID_ARGUMENTS;
 
-       jtag_add_end_state(TAP_IDLE);
+       jtag_set_end_state(TAP_IDLE);
        arm_jtag_scann(jtag_info, 0x2);
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
@@ -471,11 +471,11 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
        buf_set_u32(fields[2].out_value, 0, 1, 0);
        fields[2].in_value = NULL;
 
-       jtag_add_dr_scan(3, fields, TAP_INVALID);
+       jtag_add_dr_scan(3, fields, jtag_get_end_state());
        gettimeofday(&lap, NULL);
        do
        {
-               jtag_add_dr_scan(3, fields, TAP_INVALID);
+               jtag_add_dr_scan(3, fields, jtag_get_end_state());
                if ((retval = jtag_execute_queue()) != ERROR_OK)
                        return retval;
 
@@ -489,8 +489,9 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
        return ERROR_TARGET_TIMEOUT;
 }
 
+#ifndef HAVE_JTAG_MINIDRIVER_H
 /* this is the inner loop of the open loop DCC write of data to target */
-void MINIDRIVER(embeddedice_write_dcc)(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count)
+void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count)
 {
        int i;
        for (i = 0; i < count; i++)
@@ -499,3 +500,6 @@ void MINIDRIVER(embeddedice_write_dcc)(jtag_tap_t *tap, int reg_addr, u8 *buffer
                buffer += 4;
        }
 }
+#else
+/* provided by minidriver */
+#endif