* core entered debug mode.
*/
+static int embeddedice_set_reg_w_exec(struct reg *reg, uint8_t *buf);
+
/*
* From: ARM9E-S TRM, DDI 0165, table C-4 (and similar, for other cores)
*/
struct scan_field fields[3];
uint8_t field1_out[1];
uint8_t field2_out[1];
+ int retval;
- arm_jtag_scann(ice_reg->jtag_info, 0x2, TAP_IDLE);
+ retval = arm_jtag_scann(ice_reg->jtag_info, 0x2, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
- arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
/* bits 31:0 -- data (ignored here) */
fields[0].num_bits = 32;
struct scan_field fields[3];
uint8_t field1_out[1];
uint8_t field2_out[1];
+ int retval;
- arm_jtag_scann(jtag_info, 0x2, TAP_IDLE);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_scann(jtag_info, 0x2, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
* Write an EmbeddedICE register, updating the register cache.
* Uses embeddedice_set_reg(); not queued.
*/
-int embeddedice_set_reg_w_exec(struct reg *reg, uint8_t *buf)
+static int embeddedice_set_reg_w_exec(struct reg *reg, uint8_t *buf)
{
int retval;
void embeddedice_write_reg(struct reg *reg, uint32_t value)
{
struct embeddedice_reg *ice_reg = reg->arch_info;
+ int retval;
LOG_DEBUG("%i: 0x%8.8" PRIx32 "", ice_reg->addr, value);
- arm_jtag_scann(ice_reg->jtag_info, 0x2, TAP_IDLE);
+ retval = arm_jtag_scann(ice_reg->jtag_info, 0x2, TAP_IDLE);
- arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
uint8_t reg_addr = ice_reg->addr & 0x1f;
embeddedice_write_reg_inner(ice_reg->jtag_info->tap, reg_addr, value);
uint8_t field0_out[4];
uint8_t field1_out[1];
uint8_t field2_out[1];
+ int retval;
- arm_jtag_scann(jtag_info, 0x2, TAP_IDLE);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_scann(jtag_info, 0x2, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = field0_out;
else
return ERROR_INVALID_ARGUMENTS;
- arm_jtag_scann(jtag_info, 0x2, TAP_IDLE);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_scann(jtag_info, 0x2, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = NULL;