* hardware support for vector_catch, single stepping, and monitor mode.
*/
reg_cache_t *
-embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9)
+embeddedice_build_reg_cache(target_t *target, struct arm7_9_common *arm7_9)
{
int retval;
reg_cache_t *reg_cache = malloc(sizeof(reg_cache_t));
reg_t *reg_list = NULL;
embeddedice_reg_t *arch_info = NULL;
- arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+ struct arm_jtag *jtag_info = &arm7_9->jtag_info;
int num_regs = ARRAY_SIZE(eice_regs);
int i;
int eice_version = 0;
int embeddedice_setup(target_t *target)
{
int retval;
- struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
/* Explicitly disable monitor mode. For now we only support halting
* debug ... we don't know how to talk with a resident debug monitor
{
embeddedice_reg_t *ice_reg = reg->arch_info;
uint8_t reg_addr = ice_reg->addr & 0x1f;
- scan_field_t fields[3];
+ struct scan_field fields[3];
uint8_t field1_out[1];
uint8_t field2_out[1];
* functional clock, so the 50+ JTAG clocks needed to receive the word
* allow hundreds of instruction cycles (per word) in the target.
*/
-int embeddedice_receive(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size)
+int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size)
{
- scan_field_t fields[3];
+ struct scan_field fields[3];
uint8_t field1_out[1];
uint8_t field2_out[1];
* functional clock, so the 50+ JTAG clocks needed to receive the word
* allow hundreds of instruction cycles (per word) in the target.
*/
-int embeddedice_send(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size)
+int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size)
{
- scan_field_t fields[3];
+ struct scan_field fields[3];
uint8_t field0_out[4];
uint8_t field1_out[1];
uint8_t field2_out[1];
/**
* Poll DCC control register until read or write handshake completes.
*/
-int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, uint32_t timeout)
+int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout)
{
- scan_field_t fields[3];
+ struct scan_field fields[3];
uint8_t field0_in[4];
uint8_t field1_out[1];
uint8_t field2_out[1];
/**
* This is an inner loop of the open loop DCC write of data to target
*/
-void embeddedice_write_dcc(jtag_tap_t *tap,
+void embeddedice_write_dcc(struct jtag_tap *tap,
int reg_addr, uint8_t *buffer, int little, int count)
{
int i;