};
-static int embeddedice_reg_arch_type = -1;
-
static int embeddedice_get_reg(struct reg *reg)
{
int retval;
return retval;
}
+static const struct reg_arch_type eice_reg_type = {
+ .get = embeddedice_get_reg,
+ .set = embeddedice_set_reg_w_exec,
+};
+
/**
* Probe EmbeddedICE module and set up local records of its registers.
* Different versions of the modules have different capabilities, such as
int i;
int eice_version = 0;
- /* register arch-type for EmbeddedICE registers only once */
- if (embeddedice_reg_arch_type == -1)
- embeddedice_reg_arch_type = register_reg_arch_type(
- embeddedice_get_reg, embeddedice_set_reg_w_exec);
-
/* vector_catch isn't always present */
if (!arm7_9->has_vector_catch)
num_regs--;
reg_list[i].valid = 0;
reg_list[i].value = calloc(1, 4);
reg_list[i].arch_info = &arch_info[i];
- reg_list[i].arch_type = embeddedice_reg_arch_type;
+ reg_list[i].type = &eice_reg_type;
arch_info[i].addr = eice_regs[i].addr;
arch_info[i].jtag_info = jtag_info;
}
fields[1].tap = ice_reg->jtag_info->tap;
fields[1].num_bits = 5;
fields[1].out_value = field1_out;
- buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
+ fields[1].out_value[0] = reg_addr;
fields[1].in_value = NULL;
fields[1].check_value = NULL;
fields[1].check_mask = NULL;
fields[2].tap = ice_reg->jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = field2_out;
- buf_set_u32(fields[2].out_value, 0, 1, 0);
+ fields[2].out_value[0] = 0;
fields[2].in_value = NULL;
fields[2].check_value = NULL;
fields[2].check_mask = NULL;
* EICE_COMMS_DATA would read the register twice
* reading the control register is safe
*/
- buf_set_u32(fields[1].out_value, 0, 5, eice_regs[EICE_COMMS_CTRL].addr);
+ fields[1].out_value[0] = eice_regs[EICE_COMMS_CTRL].addr;
/* traverse Update-DR, reading but with no other side effects */
jtag_add_dr_scan_check(3, fields, jtag_get_end_state());
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 5;
fields[1].out_value = field1_out;
- buf_set_u32(fields[1].out_value, 0, 5, eice_regs[EICE_COMMS_DATA].addr);
+ fields[1].out_value[0] = eice_regs[EICE_COMMS_DATA].addr;
fields[1].in_value = NULL;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = field2_out;
- buf_set_u32(fields[2].out_value, 0, 1, 0);
+ fields[2].out_value[0] = 0;
fields[2].in_value = NULL;
jtag_add_dr_scan(3, fields, jtag_get_end_state());
* to avoid reading additional data from the DCC data reg
*/
if (size == 1)
- buf_set_u32(fields[1].out_value, 0, 5,
- eice_regs[EICE_COMMS_CTRL].addr);
+ fields[1].out_value[0] = eice_regs[EICE_COMMS_CTRL].addr;
fields[0].in_value = (uint8_t *)data;
jtag_add_dr_scan(3, fields, jtag_get_end_state());
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 5;
fields[1].out_value = field1_out;
- buf_set_u32(fields[1].out_value, 0, 5, eice_regs[EICE_COMMS_DATA].addr);
+ fields[1].out_value[0] = eice_regs[EICE_COMMS_DATA].addr;
fields[1].in_value = NULL;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = field2_out;
- buf_set_u32(fields[2].out_value, 0, 1, 1);
+ fields[2].out_value[0] = 1;
fields[2].in_value = NULL;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 5;
fields[1].out_value = field1_out;
- buf_set_u32(fields[1].out_value, 0, 5, eice_regs[EICE_COMMS_DATA].addr);
+ fields[1].out_value[0] = eice_regs[EICE_COMMS_DATA].addr;
fields[1].in_value = NULL;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = field2_out;
- buf_set_u32(fields[2].out_value, 0, 1, 0);
+ fields[2].out_value[0] = 0;
fields[2].in_value = NULL;
jtag_add_dr_scan(3, fields, jtag_get_end_state());