Michael Bruck:

[openocd.git] / src / target / cortex_swjdp.c

diff --git a/src/target/cortex_swjdp.c b/src/target/cortex_swjdp.c
index 160f4c53f5e81b7d918cf570719c82f6de0ebed9..6f26790741e2f1d4efb62c77c9315a3375599bdf 100644 (file)
--- a/src/target/cortex_swjdp.c
+++ b/src/target/cortex_swjdp.c
@@ -22,7 +22,7 @@
  * CoreSight (Light?) SerialWireJtagDebugPort                              *
  *                                                                         *
  * CoreSight™ DAP-Lite TRM, ARM DDI 0316A                                  *
- * Cortex-M3™ TRM, ARM DDI 0337C                                            *
+ * Cortex-M3™ TRM, ARM DDI 0337C                                           *
  *                                                                         *
 ***************************************************************************/
 #ifdef HAVE_CONFIG_H
@@ -327,13 +327,13 @@ int ahbap_setup_accessport(swjdp_common_t *swjdp, u32 csw, u32 tar)
        csw = csw | CSW_DBGSWENABLE | CSW_MASTER_DEBUG | CSW_HPROT;
        if (csw != swjdp->ap_csw_value)
        {
-               //DEBUG("swjdp : Set CSW %x",csw);
+               /* DEBUG("swjdp : Set CSW %x",csw); */
                ahbap_write_reg_u32(swjdp, AHBAP_CSW, csw ); 
                swjdp->ap_csw_value = csw;
        }
        if (tar != swjdp->ap_tar_value)
        {
-               //DEBUG("swjdp : Set TAR %x",tar);
+               /* DEBUG("swjdp : Set TAR %x",tar); */
                ahbap_write_reg_u32(swjdp, AHBAP_TAR, tar );
                swjdp->ap_tar_value = tar;
        }