Transform 'u32' to 'uint32_t' in src/target
[openocd.git] / src / target / cortex_m3.h
index 0ed3b0adb1d26b04615cd6b54551dcfdce1c1950..ae772543bff78b223838b6f94e13365fd1672375 100644 (file)
@@ -1,9 +1,13 @@
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
+ *                                                                         *
  *   Copyright (C) 2006 by Magnus Lundin                                   *
  *   lundin@mlu.mine.nu                                                    *
  *                                                                         *
+ *   Copyright (C) 2008 by Spencer Oliver                                  *
+ *   spen@spen-soft.co.uk                                                  *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -25,7 +29,7 @@
 #include "register.h"
 #include "target.h"
 #include "armv7m.h"
-#include "cortex_swjdp.h"
+//#include "arm_adi_v5.h"
 
 extern char* cortex_m3_state_strings[];
 
@@ -117,73 +121,48 @@ typedef struct  cortex_m3_fp_comparator_s
 {
        int used;
        int type;
-       u32 fpcr_value;
-       u32 fpcr_address;
+       uint32_t fpcr_value;
+       uint32_t fpcr_address;
 } cortex_m3_fp_comparator_t;
 
 typedef struct  cortex_m3_dwt_comparator_s
 {
        int used;
-       u32 comp;
-       u32 mask;
-       u32 function;
-       u32 dwt_comparator_address;
+       uint32_t comp;
+       uint32_t mask;
+       uint32_t function;
+       uint32_t dwt_comparator_address;
 } cortex_m3_dwt_comparator_t;
 
 typedef struct cortex_m3_common_s
 {
        int common_magic;
-//     int (*full_context)(struct target_s *target);
-
        arm_jtag_t jtag_info;
        
        /* Context information */
-       u32 dcb_dhcsr;
-       u32 nvic_dfsr;  /* Debug Fault Status Register - shows reason for debug halt */
-       u32 nvic_icsr;  /* Interrupt Control State Register - shows active and pending IRQ */
+       uint32_t dcb_dhcsr;
+       uint32_t nvic_dfsr;  /* Debug Fault Status Register - shows reason for debug halt */
+       uint32_t nvic_icsr;  /* Interrupt Control State Register - shows active and pending IRQ */
        
-       /* Flash Patch and Breakpoint */
+       /* Flash Patch and Breakpoint (FPB) */
        int fp_num_lit;
        int fp_num_code;
        int fp_code_available;
+       int fpb_enabled;
        int auto_bp_type;
        cortex_m3_fp_comparator_t *fp_comparator_list;
        
-       /* DWT */
+       /* Data Watchpoint and Trace (DWT) */
        int dwt_num_comp;
        int dwt_comp_available;
        cortex_m3_dwt_comparator_t *dwt_comparator_list;
        
        /* Interrupts */
        int intlinesnum;
-       u32 *intsetenable;
-       
-/*
-       u32 arm_bkpt;
-       u16 thumb_bkpt;
-       int sw_bkpts_use_wp;
-       int wp_available;
-       int wp0_used;
-       int wp1_used;
-       
-       int force_hw_bkpts;
-       int dbgreq_adjust_pc;
-       int use_dbgrq;
-       int has_etm;
+       uint32_t *intsetenable;
        
-       int reinit_embeddedice;
-       
-       struct working_area_s *dcc_working_area;
-       
-       int fast_memory_access;
-       int dcc_downloads;
-*/
-       /* breakpoint use map */
-       int sw_bkpts_enabled;
-
        armv7m_common_t armv7m;
-       swjdp_common_t swjdp_info;
-       
+//     swjdp_common_t swjdp_info;
        void *arch_info;
 } cortex_m3_common_t;
 
@@ -191,17 +170,16 @@ extern void cortex_m3_build_reg_cache(target_t *target);
 
 int cortex_m3_poll(target_t *target);
 int cortex_m3_halt(target_t *target);
-int cortex_m3_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
-int cortex_m3_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
+int cortex_m3_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
+int cortex_m3_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints);
 
 int cortex_m3_assert_reset(target_t *target);
 int cortex_m3_deassert_reset(target_t *target);
 int cortex_m3_soft_reset_halt(struct target_s *target);
-int cortex_m3_prepare_reset_halt(struct target_s *target);
 
-int cortex_m3_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-int cortex_m3_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-int cortex_m3_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer);
+int cortex_m3_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int cortex_m3_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int cortex_m3_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer);
 
 int cortex_m3_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
 int cortex_m3_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
@@ -210,7 +188,7 @@ int cortex_m3_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoin
 int cortex_m3_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
 int cortex_m3_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
 
-extern int cortex_m3_register_commands(struct command_context_s *cmd_ctx);
-extern int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, int chain_pos, char *variant);
+//extern int cortex_m3_register_commands(struct command_context_s *cmd_ctx);
+extern int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jtag_tap_t *tap);
 
 #endif /* CORTEX_M3_H */

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)