added stm32.cfg to install list
[openocd.git] / src / target / cortex_m3.h
index d51c4a490f5bf363a9a96c361fca3061c538e038..236911f54e491e0f878eef50b77e280c19e67a8b 100644 (file)
@@ -1,6 +1,7 @@
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
+ *                                                                         *
  *   Copyright (C) 2006 by Magnus Lundin                                   *
  *   lundin@mlu.mine.nu                                                    *
  *                                                                         *
@@ -101,10 +102,10 @@ extern char* cortex_m3_state_strings[];
 /* NVIC_SHCSR bits */
 #define SHCSR_BUSFAULTENA      (1<<17)
 /* NVIC_DFSR bits */
-#define DFSR_HALTED    1
-#define DFSR_BKPT      2
-#define DFSR_DWTTRAP   4
-#define DFSR_VCATCH    8
+#define DFSR_HALTED                    1
+#define DFSR_BKPT                      2
+#define DFSR_DWTTRAP           4
+#define DFSR_VCATCH                    8
 
 #define FPCR_CODE 0
 #define FPCR_LITERAL 1
@@ -133,7 +134,7 @@ typedef struct  cortex_m3_dwt_comparator_s
 typedef struct cortex_m3_common_s
 {
        int common_magic;
-//     int (*full_context)(struct target_s *target);
+       /* int (*full_context)(struct target_s *target); */
 
        arm_jtag_t jtag_info;
        
@@ -189,7 +190,7 @@ typedef struct cortex_m3_common_s
 
 extern void cortex_m3_build_reg_cache(target_t *target);
 
-enum target_state cortex_m3_poll(target_t *target);
+int cortex_m3_poll(target_t *target);
 int cortex_m3_halt(target_t *target);
 int cortex_m3_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
 int cortex_m3_step(struct target_s *target, int current, u32 address, int handle_breakpoints);

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