remove in_handler usage

[openocd.git] / src / target / cortex_m3.h

diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h
index 7061d668ab1607fafd24a38a9537da684916ea2b..19c7c3b558bbe07b734ed5a9ea42498a99319276 100644 (file)
--- a/src/target/cortex_m3.h
+++ b/src/target/cortex_m3.h
@@ -1,9 +1,13 @@
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
+ *                                                                         *
  *   Copyright (C) 2006 by Magnus Lundin                                   *
  *   lundin@mlu.mine.nu                                                    *
  *                                                                         *
+ *   Copyright (C) 2008 by Spencer Oliver                                  *
+ *   spen@spen-soft.co.uk                                                  *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -25,7 +29,7 @@
 #include "register.h"
 #include "target.h"
 #include "armv7m.h"
-#include "cortex_swjdp.h"
+//#include "arm_adi_v5.h"
 
 extern char* cortex_m3_state_strings[];
 
@@ -101,10 +105,10 @@ extern char* cortex_m3_state_strings[];
 /* NVIC_SHCSR bits */
 #define SHCSR_BUSFAULTENA      (1<<17)
 /* NVIC_DFSR bits */
-#define DFSR_HALTED    1
-#define DFSR_BKPT      2
-#define DFSR_DWTTRAP   4
-#define DFSR_VCATCH    8
+#define DFSR_HALTED                    1
+#define DFSR_BKPT                      2
+#define DFSR_DWTTRAP           4
+#define DFSR_VCATCH                    8
 
 #define FPCR_CODE 0
 #define FPCR_LITERAL 1
@@ -133,8 +137,6 @@ typedef struct  cortex_m3_dwt_comparator_s
 typedef struct cortex_m3_common_s
 {
        int common_magic;
-//     int (*full_context)(struct target_s *target);
-
        arm_jtag_t jtag_info;
        
        /* Context information */
@@ -142,14 +144,15 @@ typedef struct cortex_m3_common_s
        u32 nvic_dfsr;  /* Debug Fault Status Register - shows reason for debug halt */
        u32 nvic_icsr;  /* Interrupt Control State Register - shows active and pending IRQ */
        
-       /* Flash Patch and Breakpoint */
+       /* Flash Patch and Breakpoint (FPB) */
        int fp_num_lit;
        int fp_num_code;
        int fp_code_available;
+       int fpb_enabled;
        int auto_bp_type;
        cortex_m3_fp_comparator_t *fp_comparator_list;
        
-       /* DWT */
+       /* Data Watchpoint and Trace (DWT) */
        int dwt_num_comp;
        int dwt_comp_available;
        cortex_m3_dwt_comparator_t *dwt_comparator_list;
@@ -158,38 +161,14 @@ typedef struct cortex_m3_common_s
        int intlinesnum;
        u32 *intsetenable;
        
-/*
-       u32 arm_bkpt;
-       u16 thumb_bkpt;
-       int sw_bkpts_use_wp;
-       int wp_available;
-       int wp0_used;
-       int wp1_used;
-       
-       int force_hw_bkpts;
-       int dbgreq_adjust_pc;
-       int use_dbgrq;
-       int has_etm;
-       
-       int reinit_embeddedice;
-       
-       struct working_area_s *dcc_working_area;
-       
-       int fast_memory_access;
-       int dcc_downloads;
-*/
-       /* breakpoint use map */
-       int sw_bkpts_enabled;
-
        armv7m_common_t armv7m;
-       swjdp_common_t swjdp_info;
-       
+//     swjdp_common_t swjdp_info;
        void *arch_info;
 } cortex_m3_common_t;
 
 extern void cortex_m3_build_reg_cache(target_t *target);
 
-enum target_state cortex_m3_poll(target_t *target);
+int cortex_m3_poll(target_t *target);
 int cortex_m3_halt(target_t *target);
 int cortex_m3_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
 int cortex_m3_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
@@ -209,7 +188,7 @@ int cortex_m3_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoin
 int cortex_m3_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
 int cortex_m3_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
 
-extern int cortex_m3_register_commands(struct command_context_s *cmd_ctx);
-extern int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, int chain_pos, char *variant);
+//extern int cortex_m3_register_commands(struct command_context_s *cmd_ctx);
+extern int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jtag_tap_t *tap);
 
 #endif /* CORTEX_M3_H */