arm_adi_v5: fix mem_ap_read_buf_u32() JTAG nastiness..

[openocd.git] / src / target / cortex_m.h

diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 743bd13db9790392d468b7b8f74ec45c1456f190..11d70524bcc7f219cc068e6ca8944670fc36c2d6 100644 (file)
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -78,15 +78,15 @@
 #define S_RESET_ST     (1 << 25)
 
 /* DCB_DEMCR bit and field definitions */
-#define        TRCENA                  (1 << 24)
-#define        VC_HARDERR              (1 << 10)
-#define        VC_INTERR               (1 << 9)
-#define        VC_BUSERR               (1 << 8)
-#define        VC_STATERR              (1 << 7)
-#define        VC_CHKERR               (1 << 6)
-#define        VC_NOCPERR              (1 << 5)
-#define        VC_MMERR                (1 << 4)
-#define        VC_CORERESET    (1 << 0)
+#define TRCENA                 (1 << 24)
+#define VC_HARDERR             (1 << 10)
+#define VC_INTERR              (1 << 9)
+#define VC_BUSERR              (1 << 8)
+#define VC_STATERR             (1 << 7)
+#define VC_CHKERR              (1 << 6)
+#define VC_NOCPERR             (1 << 5)
+#define VC_MMERR               (1 << 4)
+#define VC_CORERESET   (1 << 0)
 
 #define NVIC_ICTR              0xE000E004
 #define NVIC_ISE0              0xE000E100
@@ -194,6 +194,7 @@ int cortex_m3_set_watchpoint(struct target *target, struct watchpoint *watchpoin
 int cortex_m3_unset_watchpoint(struct target *target, struct watchpoint *watchpoint);
 int cortex_m3_add_watchpoint(struct target *target, struct watchpoint *watchpoint);
 int cortex_m3_remove_watchpoint(struct target *target, struct watchpoint *watchpoint);
+void cortex_m3_enable_breakpoints(struct target *target);
 void cortex_m3_enable_watchpoints(struct target *target);
 void cortex_m3_dwt_setup(struct cortex_m3_common *cm3, struct target *target);