mips: Add MIPS64 support

[openocd.git] / src / target / cortex_m.c

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index ed9397aef0f6e0ff714d168fb91036f3b3411f5c..7f59401b1ff2bd06815bba9917140cf7108ad059 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -716,6 +716,11 @@ static int cortex_m_soft_reset_halt(struct target *target)
         * core, not the peripherals */
        LOG_WARNING("soft_reset_halt is deprecated, please use 'reset halt' instead.");
 
+       /* Set C_DEBUGEN */
+       retval = cortex_m_write_debug_halt_mask(target, 0, C_STEP | C_MASKINTS);
+       if (retval != ERROR_OK)
+               return retval;
+
        /* Enter debug state on reset; restore DEMCR in endreset_event() */
        retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DEMCR,
                        TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);
@@ -2093,6 +2098,15 @@ static void cortex_m_dwt_free(struct target *target)
 #define MVFR1_DEFAULT_M7_SP 0x11000011
 #define MVFR1_DEFAULT_M7_DP 0x12000011
 
+static int cortex_m_find_mem_ap(struct adiv5_dap *swjdp,
+               struct adiv5_ap **debug_ap)
+{
+       if (dap_find_ap(swjdp, AP_TYPE_AHB3_AP, debug_ap) == ERROR_OK)
+               return ERROR_OK;
+
+       return dap_find_ap(swjdp, AP_TYPE_AHB5_AP, debug_ap);
+}
+
 int cortex_m_examine(struct target *target)
 {
        int retval;
@@ -2107,7 +2121,7 @@ int cortex_m_examine(struct target *target)
        if (!armv7m->stlink) {
                if (cortex_m->apsel == DP_APSEL_INVALID) {
                        /* Search for the MEM-AP */
-                       retval = dap_find_ap(swjdp, AP_TYPE_AHB3_AP, &armv7m->debug_ap);
+                       retval = cortex_m_find_mem_ap(swjdp, &armv7m->debug_ap);
                        if (retval != ERROR_OK) {
                                LOG_ERROR("Could not find MEM-AP to control the core");
                                return retval;