cleanup: rename armv4_5 to arm for readability
[openocd.git] / src / target / cortex_m.c
index 0f26cda4d057737572ded0c2bec2e55084e6a58d..7bf6f79f56294559524a728a96c8ebedfd6a7684 100644 (file)
@@ -59,9 +59,6 @@
 
 
 /* forward declarations */
-static int cortex_m3_set_breakpoint(struct target *target, struct breakpoint *breakpoint);
-static int cortex_m3_unset_breakpoint(struct target *target, struct breakpoint *breakpoint);
-static void cortex_m3_enable_watchpoints(struct target *target);
 static int cortex_m3_store_core_reg_u32(struct target *target,
                enum armv7m_regtype type, uint32_t num, uint32_t value);
 
@@ -409,24 +406,6 @@ static int cortex_m3_examine_exception_reason(struct target *target)
        return retval;
 }
 
-/* PSP is used in some thread modes */
-static const int armv7m_psp_reg_map[17] = {
-       ARMV7M_R0, ARMV7M_R1, ARMV7M_R2, ARMV7M_R3,
-       ARMV7M_R4, ARMV7M_R5, ARMV7M_R6, ARMV7M_R7,
-       ARMV7M_R8, ARMV7M_R9, ARMV7M_R10, ARMV7M_R11,
-       ARMV7M_R12, ARMV7M_PSP, ARMV7M_R14, ARMV7M_PC,
-       ARMV7M_xPSR,
-};
-
-/* MSP is used in handler and some thread modes */
-static const int armv7m_msp_reg_map[17] = {
-       ARMV7M_R0, ARMV7M_R1, ARMV7M_R2, ARMV7M_R3,
-       ARMV7M_R4, ARMV7M_R5, ARMV7M_R6, ARMV7M_R7,
-       ARMV7M_R8, ARMV7M_R9, ARMV7M_R10, ARMV7M_R11,
-       ARMV7M_R12, ARMV7M_MSP, ARMV7M_R14, ARMV7M_PC,
-       ARMV7M_xPSR,
-};
-
 static int cortex_m3_debug_entry(struct target *target)
 {
        int i;
@@ -1142,7 +1121,7 @@ static int cortex_m3_deassert_reset(struct target *target)
        return ERROR_OK;
 }
 
-static int
+int
 cortex_m3_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
        int retval;
@@ -1217,7 +1196,7 @@ cortex_m3_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
        return ERROR_OK;
 }
 
-static int
+int
 cortex_m3_unset_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
        int retval;
@@ -1272,7 +1251,7 @@ cortex_m3_unset_breakpoint(struct target *target, struct breakpoint *breakpoint)
        return ERROR_OK;
 }
 
-static int
+int
 cortex_m3_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
        struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
@@ -1322,7 +1301,7 @@ cortex_m3_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
        return cortex_m3_set_breakpoint(target, breakpoint);
 }
 
-static int
+int
 cortex_m3_remove_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
        struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
@@ -1350,7 +1329,7 @@ cortex_m3_remove_breakpoint(struct target *target, struct breakpoint *breakpoint
        return ERROR_OK;
 }
 
-static int
+int
 cortex_m3_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
        int dwt_num = 0;
@@ -1415,7 +1394,7 @@ cortex_m3_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
        return ERROR_OK;
 }
 
-static int
+int
 cortex_m3_unset_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
        struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
@@ -1452,7 +1431,7 @@ cortex_m3_unset_watchpoint(struct target *target, struct watchpoint *watchpoint)
        return ERROR_OK;
 }
 
-static int
+int
 cortex_m3_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
        struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
@@ -1503,7 +1482,7 @@ cortex_m3_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
        return ERROR_OK;
 }
 
-static int
+int
 cortex_m3_remove_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
        struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
@@ -1526,7 +1505,7 @@ cortex_m3_remove_watchpoint(struct target *target, struct watchpoint *watchpoint
        return ERROR_OK;
 }
 
-static void cortex_m3_enable_watchpoints(struct target *target)
+void cortex_m3_enable_watchpoints(struct target *target)
 {
        struct watchpoint *watchpoint = target->watchpoints;
 
@@ -1596,7 +1575,7 @@ static int cortex_m3_load_core_reg_u32(struct target *target,
                break;
 
        default:
-               return ERROR_INVALID_ARGUMENTS;
+               return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
        return ERROR_OK;
@@ -1676,7 +1655,7 @@ static int cortex_m3_store_core_reg_u32(struct target *target,
                break;
 
        default:
-               return ERROR_INVALID_ARGUMENTS;
+               return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
        return ERROR_OK;
@@ -1687,7 +1666,7 @@ static int cortex_m3_read_memory(struct target *target, uint32_t address,
 {
        struct armv7m_common *armv7m = target_to_armv7m(target);
        struct adiv5_dap *swjdp = &armv7m->dap;
-       int retval = ERROR_INVALID_ARGUMENTS;
+       int retval = ERROR_COMMAND_SYNTAX_ERROR;
 
        /* cortex_m3 handles unaligned memory access */
        if (count && buffer) {
@@ -1712,7 +1691,7 @@ static int cortex_m3_write_memory(struct target *target, uint32_t address,
 {
        struct armv7m_common *armv7m = target_to_armv7m(target);
        struct adiv5_dap *swjdp = &armv7m->dap;
-       int retval = ERROR_INVALID_ARGUMENTS;
+       int retval = ERROR_COMMAND_SYNTAX_ERROR;
 
        if (count && buffer) {
                switch (size) {
@@ -1820,7 +1799,7 @@ cortex_m3_dwt_addreg(struct target *t, struct reg *r, struct dwt_reg *d)
        r->type = &dwt_reg_type;
 }
 
-static void
+void
 cortex_m3_dwt_setup(struct cortex_m3_common *cm3, struct target *target)
 {
        uint32_t dwtcr;
@@ -2147,7 +2126,7 @@ COMMAND_HANDLER(handle_cortex_m3_vector_catch_command)
                        }
                        if (i == ARRAY_SIZE(vec_ids)) {
                                LOG_ERROR("No CM3 vector '%s'", CMD_ARGV[CMD_ARGC]);
-                               return ERROR_INVALID_ARGUMENTS;
+                               return ERROR_COMMAND_SYNTAX_ERROR;
                        }
                }
 write:
@@ -2302,6 +2281,7 @@ static const struct command_registration cortex_m3_command_handlers[] = {
                .name = "cortex_m3",
                .mode = COMMAND_EXEC,
                .help = "Cortex-M3 command group",
+               .usage = "",
                .chain = cortex_m3_exec_command_handlers,
        },
        COMMAND_REGISTRATION_DONE

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