coding style: add parenthesis around the argument of sizeof

[openocd.git] / src / target / cortex_m.c

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 63603da395923d4e7a9baa329f456c8bba4f85b6..27febd3d779adf83dceae2f85b4d8553975a841d 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -710,11 +710,16 @@ static int cortex_m_soft_reset_halt(struct target *target)
        uint32_t dcb_dhcsr = 0;
        int retval, timeout = 0;
 
-       /* soft_reset_halt is deprecated on cortex_m as the same functionality
-        * can be obtained by using 'reset halt' and 'cortex_m reset_config vectreset'
-        * As this reset only used VC_CORERESET it would only ever reset the cortex_m
+       /* on single cortex_m MCU soft_reset_halt should be avoided as same functionality
+        * can be obtained by using 'reset halt' and 'cortex_m reset_config vectreset'.
+        * As this reset only uses VC_CORERESET it would only ever reset the cortex_m
         * core, not the peripherals */
-       LOG_WARNING("soft_reset_halt is deprecated, please use 'reset halt' instead.");
+       LOG_DEBUG("soft_reset_halt is discouraged, please use 'reset halt' instead.");
+
+       /* Set C_DEBUGEN */
+       retval = cortex_m_write_debug_halt_mask(target, 0, C_STEP | C_MASKINTS);
+       if (retval != ERROR_OK)
+               return retval;
 
        /* Enter debug state on reset; restore DEMCR in endreset_event() */
        retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DEMCR,
@@ -914,7 +919,7 @@ static int cortex_m_step(struct target *target, int current,
         * a normal step, otherwise we have to manually step over the bkpt
         * instruction - as such simulate a step */
        if (bkpt_inst_found == false) {
-               if ((cortex_m->isrmasking_mode != CORTEX_M_ISRMASK_AUTO)) {
+               if (cortex_m->isrmasking_mode != CORTEX_M_ISRMASK_AUTO) {
                        /* Automatic ISR masking mode off: Just step over the next
                         * instruction, with interrupts on or off as appropriate. */
                        cortex_m_set_maskints_for_step(target);
@@ -1975,7 +1980,7 @@ static void cortex_m_dwt_addreg(struct target *t, struct reg *r, const struct dw
 {
        struct dwt_reg_state *state;
 
-       state = calloc(1, sizeof *state);
+       state = calloc(1, sizeof(*state));
        if (!state)
                return;
        state->addr = d->addr;
@@ -2016,7 +2021,7 @@ fail0:
                return;
        }
 
-       cache = calloc(1, sizeof *cache);
+       cache = calloc(1, sizeof(*cache));
        if (!cache) {
 fail1:
                free(cm->dwt_comparator_list);
@@ -2024,7 +2029,7 @@ fail1:
        }
        cache->name = "Cortex-M DWT registers";
        cache->num_regs = 2 + cm->dwt_num_comp * 3;
-       cache->reg_list = calloc(cache->num_regs, sizeof *cache->reg_list);
+       cache->reg_list = calloc(cache->num_regs, sizeof(*cache->reg_list));
        if (!cache->reg_list) {
                free(cache);
                goto fail1;