ARMV7M_MODE_ANY = -1
};
-extern char* armv7m_mode_strings[];
+extern char *armv7m_mode_strings[];
enum armv7m_regtype
{
ARMV7M_REGISTER_MEMMAP
};
-extern char* armv7m_exception_strings[];
-
-extern char *armv7m_exception_string(int number);
+char *armv7m_exception_string(int number);
/* offsets into armv7m core register cache */
enum
{
+ /* for convenience, the first set of indices match
+ * the Cortex-M3 DCRSR selectors
+ */
+ ARMV7M_R0,
+ ARMV7M_R1,
+ ARMV7M_R2,
+ ARMV7M_R3,
+
+ ARMV7M_R4,
+ ARMV7M_R5,
+ ARMV7M_R6,
+ ARMV7M_R7,
+
+ ARMV7M_R8,
+ ARMV7M_R9,
+ ARMV7M_R10,
+ ARMV7M_R11,
+
+ ARMV7M_R12,
+ ARMV7M_R13,
+ ARMV7M_R14,
ARMV7M_PC = 15,
+
ARMV7M_xPSR = 16,
ARMV7M_MSP,
ARMV7M_PSP,
- /* FIXME the register numbers here are core-specific. Cortex-M3
- * through r1p1 only defines registers up to PSP; see ARM DDI 0337E.
- *
- * It's r2p0 (see ARM DDI 0337G) which defines the register that's
- * called SPEC20 here, with four single-byte fields with CONTROL
- * (highest byte), FAULTMASK, BASEPRI, and PRIMASK (lowest byte).
- */
- ARMV7M_SPEC20 = 20,
- ARMV7NUMCOREREGS
+ /* this next set of indices is arbitrary */
+ ARMV7M_PRIMASK,
+ ARMV7M_BASEPRI,
+ ARMV7M_FAULTMASK,
+ ARMV7M_CONTROL,
};
#define ARMV7M_COMMON_MAGIC 0x2A452A45
reg_cache_t *core_cache;
enum armv7m_mode core_mode;
int exception_number;
- swjdp_common_t swjdp_info;
-
- bool has_spec20;
+ struct swjdp_common swjdp_info;
/* Direct processor core register read and writes */
int (*load_core_reg_u32)(struct target_s *target, enum armv7m_regtype type, uint32_t num, uint32_t *value);
int (*write_core_reg)(struct target_s *target, int num);
int (*examine_debug_reason)(target_t *target);
- void (*pre_debug_entry)(target_t *target);
void (*post_debug_entry)(target_t *target);
void (*pre_restore_context)(target_t *target);
void (*post_restore_context)(target_t *target);
-
- void *arch_info;
} armv7m_common_t;
+static inline struct armv7m_common_s *
+target_to_armv7m(struct target_s *target)
+{
+ return target->arch_info;
+}
+
typedef struct armv7m_algorithm_s
{
int common_magic;
{
uint32_t num;
enum armv7m_regtype type;
- enum armv7m_mode mode;
target_t *target;
armv7m_common_t *armv7m_common;
} armv7m_core_reg_t;
-extern reg_cache_t *armv7m_build_reg_cache(target_t *target);
-extern enum armv7m_mode armv7m_number_to_mode(int number);
-extern int armv7m_mode_to_number(enum armv7m_mode mode);
+reg_cache_t *armv7m_build_reg_cache(target_t *target);
+enum armv7m_mode armv7m_number_to_mode(int number);
+int armv7m_mode_to_number(enum armv7m_mode mode);
-extern int armv7m_arch_state(struct target_s *target);
-extern int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size);
+int armv7m_arch_state(struct target_s *target);
+int armv7m_get_gdb_reg_list(target_t *target,
+ reg_t **reg_list[], int *reg_list_size);
-extern int armv7m_register_commands(struct command_context_s *cmd_ctx);
-extern int armv7m_init_arch_info(target_t *target, armv7m_common_t *armv7m);
+int armv7m_register_commands(struct command_context_s *cmd_ctx);
+int armv7m_init_arch_info(target_t *target, armv7m_common_t *armv7m);
-extern int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info);
+int armv7m_run_algorithm(struct target_s *target,
+ int num_mem_params, struct mem_param *mem_params,
+ int num_reg_params, struct reg_param *reg_params,
+ uint32_t entry_point, uint32_t exit_point,
+ int timeout_ms, void *arch_info);
-extern int armv7m_invalidate_core_regs(target_t *target);
+int armv7m_invalidate_core_regs(target_t *target);
-extern int armv7m_restore_context(target_t *target);
+int armv7m_restore_context(target_t *target);
-extern int armv7m_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum);
-extern int armv7m_blank_check_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* blank);
+int armv7m_checksum_memory(struct target_s *target,
+ uint32_t address, uint32_t count, uint32_t* checksum);
+int armv7m_blank_check_memory(struct target_s *target,
+ uint32_t address, uint32_t count, uint32_t* blank);
/* Thumb mode instructions
*/