* Copyright (C) 2006 by Magnus Lundin *
* lundin@mlu.mine.nu *
* *
+ * Copyright (C) 2008 by Spencer Oliver *
+ * spen@spen-soft.co.uk *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
"GDB dummy floating-point status register", armv7m_gdb_dummy_fps_value, 0, 1, 32, NULL, 0, NULL, 0
};
+#ifdef ARMV7_GDB_HACKS
+u8 armv7m_gdb_dummy_cpsr_value[] = {0, 0, 0, 0};
+
+reg_t armv7m_gdb_dummy_cpsr_reg =
+{
+ "GDB dummy cpsr register", armv7m_gdb_dummy_cpsr_value, 0, 1, 32, NULL, 0, NULL, 0
+};
+#endif
+
armv7m_core_reg_t armv7m_core_reg_list_arch_info[] =
{
/* CORE_GP are accesible using the core debug registers */
buf_set_u32(armv7m->core_cache->reg_list[num].value, 0, 32, reg_value);
armv7m->core_cache->reg_list[num].valid = 1;
armv7m->core_cache->reg_list[num].dirty = 0;
-
+
return ERROR_OK;
}
}
(*reg_list)[24] = &armv7m_gdb_dummy_fps_reg;
+
+#ifdef ARMV7_GDB_HACKS
+ /* use dummy cpsr reg otherwise gdb may try and set the thumb bit */
+ (*reg_list)[25] = &armv7m_gdb_dummy_cpsr_reg;
/* ARMV7M is always in thumb mode, try to make GDB understand this
* if it does not support this arch */
armv7m->core_cache->reg_list[15].value[0] |= 1;
+#else
(*reg_list)[25] = &armv7m->core_cache->reg_list[ARMV7M_xPSR];
+#endif
+
return ERROR_OK;
}
/* This code relies on the target specific resume() and poll()->debug_entry()
sequence to write register values to the processor and the read them back */
- target->type->resume(target, 0, entry_point, 1, 1);
- target->type->poll(target);
+ target_resume(target, 0, entry_point, 1, 1);
+ target_poll(target);
- while (target->state != TARGET_HALTED)
+ target_wait_state(target, TARGET_HALTED, timeout_ms);
+ if (target->state != TARGET_HALTED)
{
- usleep(5000);
- target->type->poll(target);
- if ((timeout_ms -= 5) <= 0)
+ if ((retval=target_halt(target))!=ERROR_OK)
+ return retval;
+ if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK)
{
- LOG_ERROR("timeout waiting for algorithm to complete, trying to halt target");
- target->type->halt(target);
- timeout_ms = 1000;
- while (target->state != TARGET_HALTED)
- {
- usleep(10000);
- target->type->poll(target);
- if ((timeout_ms -= 10) <= 0)
- {
- LOG_ERROR("target didn't reenter debug state, exiting");
- exit(-1);
- }
- }
- armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
- LOG_DEBUG("failed algoritm halted at 0x%x ", pc);
- retval = ERROR_TARGET_TIMEOUT;
+ return retval;
}
+ return ERROR_TARGET_TIMEOUT;
+ }
+
+
+ armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
+ if (pc != exit_point)
+ {
+ LOG_DEBUG("failed algoritm halted at 0x%x ", pc);
+ return ERROR_TARGET_TIMEOUT;
}
breakpoint_remove(target, exit_point);
armv7m_common_t *armv7m = target->arch_info;
LOG_USER("target halted due to %s, current mode: %s %s\nxPSR: 0x%8.8x pc: 0x%8.8x",
- target_debug_reason_strings[target->debug_reason],
+ Jim_Nvp_value2name_simple( nvp_target_debug_reason,target->debug_reason)->name,
armv7m_mode_strings[armv7m->core_mode],
armv7m_exception_string(armv7m->exception_number),
buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32),
return ERROR_OK;
}
+int armv7m_blank_check_memory(struct target_s *target, u32 address, u32 count, u32* blank)
+{
+ working_area_t *erase_check_algorithm;
+ reg_param_t reg_params[3];
+ armv7m_algorithm_t armv7m_info;
+ int retval;
+ int i;
+
+ u16 erase_check_code[] =
+ {
+ /* loop: */
+ 0xF810, 0x3B01, /* ldrb r3, [r0], #1 */
+ 0xEA02, 0x0203, /* and r2, r2, r3 */
+ 0x3901, /* subs r1, r1, #1 */
+ 0xD1F9, /* bne loop */
+ /* end: */
+ 0xE7FE, /* b end */
+ };
+
+ /* make sure we have a working area */
+ if (target_alloc_working_area(target, sizeof(erase_check_code), &erase_check_algorithm) != ERROR_OK)
+ {
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ }
+
+ /* convert flash writing code into a buffer in target endianness */
+ for (i = 0; i < (sizeof(erase_check_code)/sizeof(u16)); i++)
+ target_write_u16(target, erase_check_algorithm->address + i*sizeof(u16), erase_check_code[i]);
+
+ armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
+ armv7m_info.core_mode = ARMV7M_MODE_ANY;
+
+ init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
+ buf_set_u32(reg_params[0].value, 0, 32, address);
+
+ init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
+ buf_set_u32(reg_params[1].value, 0, 32, count);
+ init_reg_param(®_params[2], "r2", 32, PARAM_IN_OUT);
+ buf_set_u32(reg_params[2].value, 0, 32, 0xff);
+
+ if ((retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params,
+ erase_check_algorithm->address, erase_check_algorithm->address + (sizeof(erase_check_code)-2), 10000, &armv7m_info)) != ERROR_OK)
+ {
+ destroy_reg_param(®_params[0]);
+ destroy_reg_param(®_params[1]);
+ destroy_reg_param(®_params[2]);
+ target_free_working_area(target, erase_check_algorithm);
+ return 0;
+ }
+
+ *blank = buf_get_u32(reg_params[2].value, 0, 32);
+
+ destroy_reg_param(®_params[0]);
+ destroy_reg_param(®_params[1]);
+ destroy_reg_param(®_params[2]);
+
+ target_free_working_area(target, erase_check_algorithm);
+
+ return ERROR_OK;
+}