Add BCM2835 (as found in Raspberry Pi) interface driver
[openocd.git] / src / target / armv4_5_mmu.h
index 8f540a67b543ab1f7e2c8ce0bc09dff65898d338..e2dde7fe79ceeb87ba1e807aff3ba4abf2fde932 100644 (file)
@@ -15,8 +15,9 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program; if not, write to the                         *
  *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  ***************************************************************************/
+
 #ifndef ARMV4_5_MMU_H
 #define ARMV4_5_MMU_H
 
 
 struct target;
 
-struct armv4_5_mmu_common
-{
-       uint32_t (*get_ttb)(struct target *target);
+struct armv4_5_mmu_common {
+       int (*get_ttb)(struct target *target, uint32_t *result);
        int (*read_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-       int (*write_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-       void (*disable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
-       void (*enable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
+       int (*write_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
+       int (*disable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
+       int (*enable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
        struct armv4_5_cache_common armv4_5_cache;
        int has_tiny_pages;
        int mmu_enabled;
@@ -38,7 +38,7 @@ struct armv4_5_mmu_common
 
 int armv4_5_mmu_translate_va(struct target *target,
                struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va,
-               uint32_t *cb, int *domain, uint32_t *ap, uint32_t *val);
+               uint32_t *cb, uint32_t *val);
 
 int armv4_5_mmu_read_physical(struct target *target,
                struct armv4_5_mmu_common *armv4_5_mmu,
@@ -46,10 +46,9 @@ int armv4_5_mmu_read_physical(struct target *target,
 
 int armv4_5_mmu_write_physical(struct target *target,
                struct armv4_5_mmu_common *armv4_5_mmu,
-               uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+               uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
 
-enum
-{
+enum {
        ARMV4_5_MMU_ENABLED = 0x1,
        ARMV4_5_ALIGNMENT_CHECK = 0x2,
        ARMV4_5_MMU_S_BIT = 0x100,

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