target: Add 64-bit target address support

[openocd.git] / src / target / armv4_5_mmu.h

diff --git a/src/target/armv4_5_mmu.h b/src/target/armv4_5_mmu.h
index 4357c92ffd3f735b9afdab43efbff22e4a500f4b..7beaf4ee96323669e12abddaa53a7183d62d4af0 100644 (file)
--- a/src/target/armv4_5_mmu.h
+++ b/src/target/armv4_5_mmu.h
@@ -13,53 +13,45 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
-#ifndef ARMV4_5_MMU_H
-#define ARMV4_5_MMU_H
+
+#ifndef OPENOCD_TARGET_ARMV4_5_MMU_H
+#define OPENOCD_TARGET_ARMV4_5_MMU_H
 
 #include "armv4_5_cache.h"
-#include "target.h"
 
-struct armv4_5_mmu_common
-{
-       uint32_t (*get_ttb)(target_t *target);
-       int (*read_memory)(target_t *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-       int (*write_memory)(target_t *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-       void (*disable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache);
-       void (*enable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache);
+struct target;
+
+struct armv4_5_mmu_common {
+       int (*get_ttb)(struct target *target, uint32_t *result);
+       int (*read_memory)(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+       int (*write_memory)(struct target *target, target_addr_t address,
+                           uint32_t size, uint32_t count, const uint8_t *buffer);
+       int (*disable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
+       int (*enable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
        struct armv4_5_cache_common armv4_5_cache;
        int has_tiny_pages;
        int mmu_enabled;
 };
 
-enum
-{
-       ARMV4_5_SECTION, ARMV4_5_LARGE_PAGE, ARMV4_5_SMALL_PAGE, ARMV4_5_TINY_PAGE
-};
-
-extern char* armv4_5_page_type_names[];
-
-uint32_t armv4_5_mmu_translate_va(target_t *target,
-               struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, int *type,
-               uint32_t *cb, int *domain, uint32_t *ap);
+int armv4_5_mmu_translate_va(struct target *target,
+               struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va,
+               uint32_t *cb, uint32_t *val);
 
-int armv4_5_mmu_read_physical(target_t *target,
+int armv4_5_mmu_read_physical(struct target *target,
                struct armv4_5_mmu_common *armv4_5_mmu,
                uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 
-int armv4_5_mmu_write_physical(target_t *target,
+int armv4_5_mmu_write_physical(struct target *target,
                struct armv4_5_mmu_common *armv4_5_mmu,
-               uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+               uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
 
-enum
-{
+enum {
        ARMV4_5_MMU_ENABLED = 0x1,
        ARMV4_5_ALIGNMENT_CHECK = 0x2,
        ARMV4_5_MMU_S_BIT = 0x100,
        ARMV4_5_MMU_R_BIT = 0x200
 };
 
-#endif /* ARMV4_5_MMU_H */
+#endif /* OPENOCD_TARGET_ARMV4_5_MMU_H */