file not found SEGFAULT fix

[openocd.git] / src / target / armv4_5.h

diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h
index 47996de4f0f243d413d3d99fda793baee9181901..b4ac07378b621238679712bcb145b2c05e9238aa 100644 (file)
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -2,6 +2,9 @@
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
+ *   Copyright (C) 2008 by Spencer Oliver                                  *
+ *   spen@spen-soft.co.uk                                                  *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -22,8 +25,9 @@
 
 #include "register.h"
 #include "target.h"
+#include "log.h"
 
-enum armv4_5_mode
+typedef enum armv4_5_mode
 {
        ARMV4_5_MODE_USR = 16, 
        ARMV4_5_MODE_FIQ = 17, 
@@ -33,16 +37,16 @@ enum armv4_5_mode
        ARMV4_5_MODE_UND = 27,
        ARMV4_5_MODE_SYS = 31,
        ARMV4_5_MODE_ANY = -1
-};
+} armv4_5_mode_t;
 
-extern char* armv4_5_mode_strings[];
+extern char** armv4_5_mode_strings;
 
-enum armv4_5_state
+typedef enum armv4_5_state
 {
        ARMV4_5_STATE_ARM,
        ARMV4_5_STATE_THUMB,
        ARMV4_5_STATE_JAZELLE,
-};
+} armv4_5_state_t;
 
 extern char* armv4_5_state_strings[];
 
@@ -95,10 +99,46 @@ typedef struct armv4_5_core_reg_s
 } armv4_5_core_reg_t;
 
 extern reg_cache_t* armv4_5_build_reg_cache(target_t *target, armv4_5_common_t *armv4_5_common);
-extern enum armv4_5_mode armv4_5_number_to_mode(int number);
-extern int armv4_5_mode_to_number(enum armv4_5_mode mode);
 
-extern int armv4_5_arch_state(struct target_s *target, char *buf, int buf_size);
+/* map psr mode bits to linear number */
+static __inline int armv4_5_mode_to_number(enum armv4_5_mode mode)
+{
+       switch (mode)
+       {
+               case ARMV4_5_MODE_USR: return 0; break;
+               case ARMV4_5_MODE_FIQ: return 1; break;
+               case ARMV4_5_MODE_IRQ: return 2; break;
+               case ARMV4_5_MODE_SVC: return 3; break;
+               case ARMV4_5_MODE_ABT: return 4; break;
+               case ARMV4_5_MODE_UND: return 5; break;
+               case ARMV4_5_MODE_SYS: return 6; break;
+               case ARMV4_5_MODE_ANY: return 0; break; /* map MODE_ANY to user mode */
+               default: 
+                       LOG_ERROR("invalid mode value encountered");
+                       return -1;
+       }
+}
+
+/* map linear number to mode bits */
+static __inline enum armv4_5_mode armv4_5_number_to_mode(int number)
+{
+       switch(number)
+       {
+               case 0: return ARMV4_5_MODE_USR; break;
+               case 1: return ARMV4_5_MODE_FIQ; break;
+               case 2: return ARMV4_5_MODE_IRQ; break;
+               case 3: return ARMV4_5_MODE_SVC; break;
+               case 4: return ARMV4_5_MODE_ABT; break;
+               case 5: return ARMV4_5_MODE_UND; break;
+               case 6: return ARMV4_5_MODE_SYS; break;
+               default: 
+                       LOG_ERROR("mode index out of bounds");
+                       return -1;
+       }
+};
+
+
+extern int armv4_5_arch_state(struct target_s *target);
 extern int armv4_5_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size);
 extern int armv4_5_invalidate_core_regs(target_t *target);
 
@@ -213,6 +253,11 @@ extern int armv4_5_invalidate_core_regs(target_t *target);
  */
 #define ARMV4_5_MCR(CP, op1, Rd, CRn, CRm, op2) (0xee000010 | (CRm) | ((op2) << 5) | ((CP) << 8) | ((Rd) << 12) | ((CRn) << 16) | ((op1) << 21)) 
 
+/* Breakpoint instruction (ARMv5)
+ * Im: 16-bit immediate
+ */
+#define ARMV5_BKPT(Im) (0xe1200070 | ((Im & 0xfff0) << 8) | (Im & 0xf))
+
 
 /* Thumb mode instructions
  */
@@ -266,4 +311,9 @@ extern int armv4_5_invalidate_core_regs(target_t *target);
  */
 #define ARMV4_5_T_B(Imm)       ((0xe000 | (Imm)) | ((0xe000 | (Imm)) << 16))
 
+/* Breakpoint instruction (ARMv5) (Thumb state)
+ * Im: 8-bit immediate
+ */
+#define ARMV5_T_BKPT(Im) ((0xbe00 | Im) | ((0xbe00 | Im) << 16))
+
 #endif /* ARMV4_5_H */