if (armv4_5_core_reg_arch_type == -1)
armv4_5_core_reg_arch_type = register_reg_arch_type(armv4_5_get_core_reg, armv4_5_set_core_reg);
+ register_init_dummy(&armv4_5_gdb_dummy_fp_reg);
+ register_init_dummy(&armv4_5_gdb_dummy_fps_reg);
+
for (i = 0; i < 37; i++)
{
arch_info[i] = armv4_5_core_reg_list_arch_info[i];
int handle_armv4_5_disassemble_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
+ int retval = ERROR_OK;
target_t *target = get_current_target(cmd_ctx);
armv4_5_common_t *armv4_5 = target->arch_info;
u32 address;
for (i = 0; i < count; i++)
{
- target_read_u32(target, address, &opcode);
- arm_evaluate_opcode(opcode, address, &cur_instruction);
+ if((retval = target_read_u32(target, address, &opcode)) != ERROR_OK)
+ {
+ return retval;
+ }
+ if((retval = arm_evaluate_opcode(opcode, address, &cur_instruction)) != ERROR_OK)
+ {
+ return retval;
+ }
command_print(cmd_ctx, "%s", cur_instruction.text);
address += (thumb) ? 2 : 4;
}
return ERROR_OK;
}
-int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info)
+/* wait for execution to complete and check exit point */
+static int armv4_5_run_algorithm_completion(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info)
+{
+ int retval;
+ armv4_5_common_t *armv4_5 = target->arch_info;
+
+ if((retval = target_wait_state(target, TARGET_HALTED, timeout_ms)) != ERROR_OK)
+ {
+ return retval;
+ }
+ if (target->state != TARGET_HALTED)
+ {
+ if ((retval=target_halt(target))!=ERROR_OK)
+ return retval;
+ if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK)
+ {
+ return retval;
+ }
+ return ERROR_TARGET_TIMEOUT;
+ }
+ if (buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) != exit_point)
+ {
+ LOG_WARNING("target reentered debug state, but not at the desired exit point: 0x%4.4x",
+ buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
+ return ERROR_TARGET_TIMEOUT;
+ }
+
+ return ERROR_OK;
+}
+
+int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info))
{
armv4_5_common_t *armv4_5 = target->arch_info;
armv4_5_algorithm_t *armv4_5_algorithm_info = arch_info;
for (i = 0; i < num_mem_params; i++)
{
- target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
+ if((retval = target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK)
+ {
+ return retval;
+ }
}
for (i = 0; i < num_reg_params; i++)
exit(-1);
}
- armv4_5_set_core_reg(reg, reg_params[i].value);
+ if((retval = armv4_5_set_core_reg(reg, reg_params[i].value)) != ERROR_OK)
+ {
+ return retval;
+ }
}
armv4_5->core_state = armv4_5_algorithm_info->core_state;
return ERROR_TARGET_FAILURE;
}
- target_resume(target, 0, entry_point, 1, 1);
-
- target_wait_state(target, TARGET_HALTED, timeout_ms);
- if (target->state != TARGET_HALTED)
- {
- if ((retval=target_halt(target))!=ERROR_OK)
- return retval;
- if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK)
- {
- return retval;
- }
- return ERROR_TARGET_TIMEOUT;
- }
-
- if (buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) != exit_point)
+ if((retval = target_resume(target, 0, entry_point, 1, 1)) != ERROR_OK)
{
- LOG_WARNING("target reentered debug state, but not at the desired exit point: 0x%4.4x",
- buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
- return ERROR_TARGET_TIMEOUT;
+ return retval;
}
+ int retvaltemp;
+ retval=run_it(target, exit_point, timeout_ms, arch_info);
breakpoint_remove(target, exit_point);
+ if (retval!=ERROR_OK)
+ return retval;
+
for (i = 0; i < num_mem_params; i++)
{
if (mem_params[i].direction != PARAM_OUT)
- target_read_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
+ if((retvaltemp = target_read_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK)
+ {
+ retval = retvaltemp;
+ }
}
for (i = 0; i < num_reg_params; i++)
return retval;
}
+
+int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info)
+{
+ return armv4_5_run_algorithm_inner(target, num_mem_params, mem_params, num_reg_params, reg_params, entry_point, exit_point, timeout_ms, arch_info, armv4_5_run_algorithm_completion);
+}
+
int armv4_5_init_arch_info(target_t *target, armv4_5_common_t *armv4_5)
{
target->arch_info = armv4_5;