build: cleanup src/server directory

[openocd.git] / src / target / arm_simulator.c

diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c
index 0f6fe3f5e1fb972ce8ffedef969dc6e923ef1ae7..a0ffdde5e80bc91984b81bb2dc116d163d913822 100644 (file)
--- a/src/target/arm_simulator.c
+++ b/src/target/arm_simulator.c
@@ -519,7 +519,7 @@ static int arm_simulate_step_core(struct target *target,
        /* load register instructions */
        else if ((instruction.type >= ARM_LDR) && (instruction.type <= ARM_LDRSH))
        {
-               uint32_t load_address = 0, modified_address = 0, load_value;
+               uint32_t load_address = 0, modified_address = 0, load_value = 0;
                uint32_t Rn = sim->get_reg_mode(sim, instruction.info.load_store.Rn);
 
                /* adjust Rn in case the PC is being read */
@@ -666,15 +666,12 @@ static int arm_simulate_step_core(struct target *target,
                }
                else
                {
-                       enum arm_mode mode = sim->get_mode(sim);
                        int update_cpsr = 0;
 
                        if (instruction.info.load_store_multiple.S)
                        {
                                if (instruction.info.load_store_multiple.register_list & 0x8000)
                                        update_cpsr = 1;
-                               else
-                                       mode = ARM_MODE_USR;
                        }
 
                        for (i = 0; i < 16; i++)
@@ -722,7 +719,6 @@ static int arm_simulate_step_core(struct target *target,
                        uint32_t Rn = sim->get_reg_mode(sim,
                                        instruction.info.load_store_multiple.Rn);
                        int bits_set = 0;
-                       enum arm_mode mode = sim->get_mode(sim);
 
                        for (i = 0; i < 16; i++)
                        {
@@ -730,11 +726,6 @@ static int arm_simulate_step_core(struct target *target,
                                        bits_set++;
                        }
 
-                       if (instruction.info.load_store_multiple.S)
-                       {
-                               mode = ARM_MODE_USR;
-                       }
-
                        switch (instruction.info.load_store_multiple.addressing_mode)
                        {
                                case 0: /* Increment after */
@@ -790,71 +781,71 @@ static int arm_simulate_step_core(struct target *target,
 
 static uint32_t armv4_5_get_reg(struct arm_sim_interface *sim, int reg)
 {
-       struct arm *armv4_5 = (struct arm *)sim->user_data;
+       struct arm *arm = (struct arm *)sim->user_data;
 
-       return buf_get_u32(armv4_5->core_cache->reg_list[reg].value, 0, 32);
+       return buf_get_u32(arm->core_cache->reg_list[reg].value, 0, 32);
 }
 
 static void armv4_5_set_reg(struct arm_sim_interface *sim, int reg, uint32_t value)
 {
-       struct arm *armv4_5 = (struct arm *)sim->user_data;
+       struct arm *arm = (struct arm *)sim->user_data;
 
-       buf_set_u32(armv4_5->core_cache->reg_list[reg].value, 0, 32, value);
+       buf_set_u32(arm->core_cache->reg_list[reg].value, 0, 32, value);
 }
 
 static uint32_t armv4_5_get_reg_mode(struct arm_sim_interface *sim, int reg)
 {
-       struct arm *armv4_5 = (struct arm *)sim->user_data;
+       struct arm *arm = (struct arm *)sim->user_data;
 
-       return buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache,
-                       armv4_5->core_mode, reg).value, 0, 32);
+       return buf_get_u32(ARMV4_5_CORE_REG_MODE(arm->core_cache,
+                       arm->core_mode, reg).value, 0, 32);
 }
 
 static void armv4_5_set_reg_mode(struct arm_sim_interface *sim, int reg, uint32_t value)
 {
-       struct arm *armv4_5 = (struct arm *)sim->user_data;
+       struct arm *arm = (struct arm *)sim->user_data;
 
-       buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache,
-                       armv4_5->core_mode, reg).value, 0, 32, value);
+       buf_set_u32(ARMV4_5_CORE_REG_MODE(arm->core_cache,
+                       arm->core_mode, reg).value, 0, 32, value);
 }
 
 static uint32_t armv4_5_get_cpsr(struct arm_sim_interface *sim, int pos, int bits)
 {
-       struct arm *armv4_5 = (struct arm *)sim->user_data;
+       struct arm *arm = (struct arm *)sim->user_data;
 
-       return buf_get_u32(armv4_5->cpsr->value, pos, bits);
+       return buf_get_u32(arm->cpsr->value, pos, bits);
 }
 
 static enum arm_state armv4_5_get_state(struct arm_sim_interface *sim)
 {
-       struct arm *armv4_5 = (struct arm *)sim->user_data;
+       struct arm *arm = (struct arm *)sim->user_data;
 
-       return armv4_5->core_state;
+       return arm->core_state;
 }
 
 static void armv4_5_set_state(struct arm_sim_interface *sim, enum arm_state mode)
 {
-       struct arm *armv4_5 = (struct arm *)sim->user_data;
+       struct arm *arm = (struct arm *)sim->user_data;
 
-       armv4_5->core_state = mode;
+       arm->core_state = mode;
 }
 
 
 static enum arm_mode armv4_5_get_mode(struct arm_sim_interface *sim)
 {
-       struct arm *armv4_5 = (struct arm *)sim->user_data;
+       struct arm *arm = (struct arm *)sim->user_data;
 
-       return armv4_5->core_mode;
+       return arm->core_mode;
 }
 
 
 
 int arm_simulate_step(struct target *target, uint32_t *dry_run_pc)
 {
-       struct arm *armv4_5 = target_to_arm(target);
+       struct arm *arm = target_to_arm(target);
        struct arm_sim_interface sim;
 
-       sim.user_data = armv4_5;
+       sim.user_data = arm;
        sim.get_reg = &armv4_5_get_reg;
        sim.set_reg = &armv4_5_set_reg;
        sim.get_reg_mode = &armv4_5_get_reg_mode;