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[openocd.git] / src / target / arm_simulator.c
diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c
index 4b8d86e7ac26b8d360979028af0cc4a7552d04b5..908c61331365a1b123680261c19cb8bb016ebc63 100644 (file)
--- a/src/target/arm_simulator.c
+++ b/src/target/arm_simulator.c
@@ -24,6 +24,7 @@
 #include "config.h"
 #endif
 
+#include "arm.h"
 #include "armv4_5.h"
 #include "arm_disassembler.h"
 #include "arm_simulator.h"
@@ -135,7 +136,7 @@ static uint32_t arm_shifter_operand(struct arm_sim_interface *sim,
        uint32_t return_value;
        int instruction_size;
 
-       if (sim->get_state(sim) == ARMV4_5_STATE_ARM)
+       if (sim->get_state(sim) == ARM_STATE_ARM)
                instruction_size = 4;
        else
                instruction_size = 2;
@@ -286,7 +287,7 @@ int arm_simulate_step_core(struct target *target,
        int instruction_size;
        int retval = ERROR_OK;
 
-       if (sim->get_state(sim) == ARMV4_5_STATE_ARM)
+       if (sim->get_state(sim) == ARM_STATE_ARM)
        {
                uint32_t opcode;
 
@@ -392,7 +393,7 @@ int arm_simulate_step_core(struct target *target,
                        else if (instruction.type == ARM_BL)
                        {
                                uint32_t old_pc = sim->get_reg(sim, 15);
-                               int T = (sim->get_state(sim) == ARMV4_5_STATE_THUMB);
+                               int T = (sim->get_state(sim) == ARM_STATE_THUMB);
                                sim->set_reg_mode(sim, 14, old_pc + 4 + T);
                                sim->set_reg(sim, 15, target);
                        }
@@ -400,27 +401,27 @@ int arm_simulate_step_core(struct target *target,
                        {
                                if (target & 0x1)
                                {
-                                       sim->set_state(sim, ARMV4_5_STATE_THUMB);
+                                       sim->set_state(sim, ARM_STATE_THUMB);
                                }
                                else
                                {
-                                       sim->set_state(sim, ARMV4_5_STATE_ARM);
+                                       sim->set_state(sim, ARM_STATE_ARM);
                                }
                                sim->set_reg(sim, 15, target & 0xfffffffe);
                        }
                        else if (instruction.type == ARM_BLX)
                        {
                                uint32_t old_pc = sim->get_reg(sim, 15);
-                               int T = (sim->get_state(sim) == ARMV4_5_STATE_THUMB);
+                               int T = (sim->get_state(sim) == ARM_STATE_THUMB);
                                sim->set_reg_mode(sim, 14, old_pc + 4 + T);
 
                                if (target & 0x1)
                                {
-                                       sim->set_state(sim, ARMV4_5_STATE_THUMB);
+                                       sim->set_state(sim, ARM_STATE_THUMB);
                                }
                                else
                                {
-                                       sim->set_state(sim, ARMV4_5_STATE_ARM);
+                                       sim->set_state(sim, ARM_STATE_ARM);
                                }
                                sim->set_reg(sim, 15, target & 0xfffffffe);
                        }
@@ -493,9 +494,9 @@ int arm_simulate_step_core(struct target *target,
                        if (instruction.info.data_proc.Rd == 15) {
                                sim->set_reg_mode(sim, 15, Rd & ~1);
                                if (Rd & 1)
-                                       sim->set_state(sim, ARMV4_5_STATE_THUMB);
+                                       sim->set_state(sim, ARM_STATE_THUMB);
                                else
-                                       sim->set_state(sim, ARMV4_5_STATE_ARM);
+                                       sim->set_state(sim, ARM_STATE_ARM);
                                return ERROR_OK;
                        }
                        sim->set_reg_mode(sim, instruction.info.data_proc.Rd, Rd);
@@ -605,9 +606,9 @@ int arm_simulate_step_core(struct target *target,
                        if (instruction.info.load_store.Rd == 15) {
                                sim->set_reg_mode(sim, 15, load_value & ~1);
                                if (load_value & 1)
-                                       sim->set_state(sim, ARMV4_5_STATE_THUMB);
+                                       sim->set_state(sim, ARM_STATE_THUMB);
                                else
-                                       sim->set_state(sim, ARMV4_5_STATE_ARM);
+                                       sim->set_state(sim, ARM_STATE_ARM);
                                return ERROR_OK;
                        }
                        sim->set_reg_mode(sim, instruction.info.load_store.Rd, load_value);
@@ -665,7 +666,7 @@ int arm_simulate_step_core(struct target *target,
                }
                else
                {
-                       enum armv4_5_mode mode = sim->get_mode(sim);
+                       enum arm_mode mode = sim->get_mode(sim);
                        int update_cpsr = 0;
 
                        if (instruction.info.load_store_multiple.S)
@@ -673,7 +674,7 @@ int arm_simulate_step_core(struct target *target,
                                if (instruction.info.load_store_multiple.register_list & 0x8000)
                                        update_cpsr = 1;
                                else
-                                       mode = ARMV4_5_MODE_USR;
+                                       mode = ARM_MODE_USR;
                        }
 
                        for (i = 0; i < 16; i++)
@@ -684,9 +685,9 @@ int arm_simulate_step_core(struct target *target,
                                                uint32_t val = load_values[i];
                                        sim->set_reg_mode(sim, i, val & ~1);
                                        if (val & 1)
-                                               sim->set_state(sim, ARMV4_5_STATE_THUMB);
+                                               sim->set_state(sim, ARM_STATE_THUMB);
                                        else
-                                               sim->set_state(sim, ARMV4_5_STATE_ARM);
+                                               sim->set_state(sim, ARM_STATE_ARM);
                                        } else {
                                                sim->set_reg_mode(sim, i, load_values[i]);
                                        }
@@ -721,7 +722,7 @@ int arm_simulate_step_core(struct target *target,
                        uint32_t Rn = sim->get_reg_mode(sim,
                                        instruction.info.load_store_multiple.Rn);
                        int bits_set = 0;
-                       enum armv4_5_mode mode = sim->get_mode(sim);
+                       enum arm_mode mode = sim->get_mode(sim);
 
                        for (i = 0; i < 16; i++)
                        {
@@ -731,7 +732,7 @@ int arm_simulate_step_core(struct target *target,
 
                        if (instruction.info.load_store_multiple.S)
                        {
-                               mode = ARMV4_5_MODE_USR;
+                               mode = ARM_MODE_USR;
                        }
 
                        switch (instruction.info.load_store_multiple.addressing_mode)
@@ -824,14 +825,14 @@ static uint32_t armv4_5_get_cpsr(struct arm_sim_interface *sim, int pos, int bit
        return buf_get_u32(armv4_5->cpsr->value, pos, bits);
 }
 
-static enum armv4_5_state armv4_5_get_state(struct arm_sim_interface *sim)
+static enum arm_state armv4_5_get_state(struct arm_sim_interface *sim)
 {
        struct arm *armv4_5 = (struct arm *)sim->user_data;
 
        return armv4_5->core_state;
 }
 
-static void armv4_5_set_state(struct arm_sim_interface *sim, enum armv4_5_state mode)
+static void armv4_5_set_state(struct arm_sim_interface *sim, enum arm_state mode)
 {
        struct arm *armv4_5 = (struct arm *)sim->user_data;
 
@@ -839,7 +840,7 @@ static void armv4_5_set_state(struct arm_sim_interface *sim, enum armv4_5_state
 }
 
 
-static enum armv4_5_mode armv4_5_get_mode(struct arm_sim_interface *sim)
+static enum arm_mode armv4_5_get_mode(struct arm_sim_interface *sim)
 {
        struct arm *armv4_5 = (struct arm *)sim->user_data;
 
@@ -850,7 +851,7 @@ static enum armv4_5_mode armv4_5_get_mode(struct arm_sim_interface *sim)
 
 int arm_simulate_step(struct target *target, uint32_t *dry_run_pc)
 {
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
        struct arm_sim_interface sim;
 
        sim.user_data = armv4_5;
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