* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
/**
#include "armv4_5.h"
#include "arm7_9_common.h"
#include "armv7m.h"
-#include "cortex_m3.h"
+#include "cortex_m.h"
#include "register.h"
#include "arm_semihosting.h"
#include <helper/binarybuffer.h>
struct arm *arm = target_to_arm(target);
uint32_t r0 = buf_get_u32(arm->core_cache->reg_list[0].value, 0, 32);
uint32_t r1 = buf_get_u32(arm->core_cache->reg_list[1].value, 0, 32);
- uint32_t lr, spsr;
uint8_t params[16];
int retval, result;
- if (is_arm7_9(target_to_arm7_9(target)))
- {
- lr = buf_get_u32(ARMV4_5_CORE_REG_MODE(arm->core_cache, ARM_MODE_SVC, 14).value, 0, 32);
- spsr = buf_get_u32(arm->spsr->value, 0, 32);;
- }
-
/*
* TODO: lots of security issues are not considered yet, such as:
* - no validation on target provided file descriptors
case 0x04: /* SYS_WRITE0 */
do {
unsigned char c;
- retval = target_read_memory(target, r1, 1, 1, &c);
+ retval = target_read_memory(target, r1++, 1, 1, &c);
if (retval != ERROR_OK)
return retval;
if (!c)
if (l < s)
result = -1;
else {
- retval = target_write_buffer(target, a, s, (void*)arg);
+ retval = target_write_buffer(target, a, s, (uint8_t *)arg);
if (retval != ERROR_OK)
return retval;
result = 0;
}
return target_call_event_callbacks(target, TARGET_EVENT_HALTED);
+ case 0x12: /* SYS_SYSTEM */
+ /* Provide SYS_SYSTEM functionality. Uses the
+ * libc system command, there may be a reason *NOT*
+ * to use this, but as I can't think of one, I
+ * implemented it this way.
+ */
+ retval = target_read_memory(target, r1, 4, 2, params);
+ if (retval != ERROR_OK)
+ return retval;
+ else {
+ uint32_t len = target_buffer_get_u32(target, params+4);
+ uint32_t c_ptr = target_buffer_get_u32(target, params);
+ uint8_t cmd[256];
+ if (len > 255) {
+ result = -1;
+ arm->semihosting_errno = EINVAL;
+ } else {
+ memset(cmd, 0x0, 256);
+ retval = target_read_memory(target, c_ptr, 1, len, cmd);
+ if (retval != ERROR_OK)
+ return retval;
+ else
+ result = system((const char *)cmd);
+ }
+ }
+ break;
case 0x0d: /* SYS_TMPNAM */
case 0x10: /* SYS_CLOCK */
- case 0x12: /* SYS_SYSTEM */
case 0x17: /* angel_SWIreason_EnterSVC */
case 0x30: /* SYS_ELAPSED */
case 0x31: /* SYS_TICKFREQ */
/* resume execution to the original mode */
- if (is_arm7_9(target_to_arm7_9(target)))
- {
+ /* REVISIT this looks wrong ... ARM11 and Cortex-A8
+ * should work this way at least sometimes.
+ */
+ if (is_arm7_9(target_to_arm7_9(target))) {
+ uint32_t spsr;
+
/* return value in R0 */
buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, result);
arm->core_cache->reg_list[0].dirty = 1;
/* LR --> PC */
- buf_set_u32(arm->core_cache->reg_list[15].value, 0, 32, lr);
+ buf_set_u32(arm->core_cache->reg_list[15].value, 0, 32,
+ buf_get_u32(arm_reg_current(arm, 14)->value, 0, 32));
arm->core_cache->reg_list[15].dirty = 1;
/* saved PSR --> current PSR */
+ spsr = buf_get_u32(arm->spsr->value, 0, 32);
+
+ /* REVISIT should this be arm_set_cpsr(arm, spsr)
+ * instead of a partially unrolled version?
+ */
+
buf_set_u32(arm->cpsr->value, 0, 32, spsr);
arm->cpsr->dirty = 1;
arm->core_mode = spsr & 0x1f;
if (spsr & 0x20)
arm->core_state = ARM_STATE_THUMB;
- }
- else
- {
+
+ } else {
/* resume execution, this will be pc+2 to skip over the
* bkpt instruction */
if (!arm->is_semihosting)
return 0;
- if (is_arm7_9(target_to_arm7_9(target)))
- {
+ if (is_arm7_9(target_to_arm7_9(target))) {
if (arm->core_mode != ARM_MODE_SVC)
return 0;
if (insn != 0xEF123456)
return 0;
}
- }
- else if (is_armv7m(target_to_armv7m(target)))
- {
+ } else if (is_armv7m(target_to_armv7m(target))) {
uint16_t insn;
if (target->debug_reason != DBG_REASON_BREAKPOINT)
/* bkpt 0xAB */
if (insn != 0xBEAB)
return 0;
- }
- else
- {
+ } else {
LOG_ERROR("Unsupported semi-hosting Target");
return 0;
}