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David Brownell <david-b@pacbell.net> More instruction decoding fixes:
[openocd.git] / src / target / arm_disassembler.c
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index 2b854e7bfec4311cb2ccbef7efd144585c8ae750..d961f96adf595801160496905aacaf3632ca09ad 100644 (file)
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -2,6 +2,8 @@
  *   Copyright (C) 2006 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
+ *   Copyright (C) 2009 by David Brownell                                  *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -1642,7 +1644,7 @@ int evaluate_data_proc_thumb(uint16_t opcode, uint32_t address, arm_instruction_
                                break;
                        case 0x9:
                                instruction->type = ARM_RSB;
-                               mnemonic = "NEGS";
+                               mnemonic = "RSBS";
                                instruction->info.data_proc.variant = 0 /*immediate*/;
                                instruction->info.data_proc.shifter_operand.immediate.immediate = 0;
                                instruction->info.data_proc.Rn = Rm;
@@ -1942,17 +1944,21 @@ int evaluate_load_store_multiple_thumb(uint16_t opcode, uint32_t address, arm_in
 
        if ((opcode & 0xf000) == 0xc000)
        { /* generic load/store multiple */
+               char *wback = "!";
+
                if (L)
                {
                        instruction->type = ARM_LDM;
                        mnemonic = "LDM";
+                       if (opcode & (1 << Rn))
+                               wback = "";
                }
                else
                {
                        instruction->type = ARM_STM;
                        mnemonic = "STM";
                }
-               snprintf(ptr_name,7,"r%i!, ",Rn);
+               snprintf(ptr_name, sizeof ptr_name, "r%i%s, ", Rn, wback);
        }
        else
        { /* push/pop */
@@ -2096,7 +2102,7 @@ static int evaluate_byterev_thumb(uint16_t opcode, uint32_t address,
        char *suffix;
 
        /* added in ARMv6 */
-       switch (opcode & 0x00c0) {
+       switch ((opcode >> 6) & 3) {
        case 0:
                suffix = "";
                break;
@@ -2598,7 +2604,6 @@ static int t2ev_data_mod_immed(uint32_t opcode, uint32_t address,
                        mnemonic = "TST";
                        one = true;
                        suffix = "";
-                       suffix2 = ".W";
                        rd = rn;
                } else {
                        instruction->type = ARM_AND;
@@ -2658,6 +2663,7 @@ static int t2ev_data_mod_immed(uint32_t opcode, uint32_t address,
        case 10:
                instruction->type = ARM_ADC;
                mnemonic = "ADC";
+               suffix2 = ".W";
                break;
        case 11:
                instruction->type = ARM_SBC;
@@ -2706,8 +2712,8 @@ static int t2ev_data_immed(uint32_t opcode, uint32_t address,
        bool add = false;
        bool is_signed = false;
 
-       immed = (opcode & 0x0ff) | ((opcode & 0x7000) >> 12);
-       if (opcode & (1 << 27))
+       immed = (opcode & 0x0ff) | ((opcode & 0x7000) >> 4);
+       if (opcode & (1 << 26))
                immed |= (1 << 11);
 
        switch ((opcode >> 20) & 0x1f) {
@@ -2716,15 +2722,16 @@ static int t2ev_data_immed(uint32_t opcode, uint32_t address,
                        add = true;
                        goto do_adr;
                }
-               mnemonic = "ADD.W";
+               mnemonic = "ADDW";
                break;
        case 4:
-               mnemonic = "MOV.W";
-               break;
+               immed |= (opcode >> 4) & 0xf000;
+               sprintf(cp, "MOVW\tr%d, #%d\t; %#3.3x", rd, immed, immed);
+               return ERROR_OK;
        case 0x0a:
                if (rn == 0xf)
                        goto do_adr;
-               mnemonic = "SUB.W";
+               mnemonic = "SUBW";
                break;
        case 0x0c:
                /* move constant to top 16 bits of register */
@@ -2741,7 +2748,7 @@ static int t2ev_data_immed(uint32_t opcode, uint32_t address,
                immed |= (opcode >> 10) & 0x1c;
                sprintf(cp, "%sSAT\tr%d, #%d, r%d, %s #%d\t",
                                is_signed ? "S" : "U",
-                               rd, (int) (opcode & 0x1f) + 1, rn,
+                               rd, (int) (opcode & 0x1f) + is_signed, rn,
                                (opcode & (1 << 21)) ? "ASR" : "LSL",
                                immed ? immed : 32);
                return ERROR_OK;
@@ -2962,22 +2969,22 @@ static int t2ev_ldm_stm(uint32_t opcode, uint32_t address,
 
        switch (op) {
        case 2:
-               sprintf(cp, "STMB\tr%d%s, ", rn, t ? "!" : "");
+               sprintf(cp, "STM.W\tr%d%s, ", rn, t ? "!" : "");
                break;
        case 3:
                if (rn == 13 && t)
-                       sprintf(cp, "POP\t");
+                       sprintf(cp, "POP.W\t");
                else
                        sprintf(cp, "LDM.W\tr%d%s, ", rn, t ? "!" : "");
                break;
        case 4:
                if (rn == 13 && t)
-                       sprintf(cp, "PUSH\t");
+                       sprintf(cp, "PUSH.W\t");
                else
-                       sprintf(cp, "STM.W\tr%d%s, ", rn, t ? "!" : "");
+                       sprintf(cp, "STMDB\tr%d%s, ", rn, t ? "!" : "");
                break;
        case 5:
-               sprintf(cp, "LDMB\tr%d%s, ", rn, t ? "!" : "");
+               sprintf(cp, "LDMDB.W\tr%d%s, ", rn, t ? "!" : "");
                break;
        default:
                return ERROR_INVALID_ARGUMENTS;
@@ -3199,7 +3206,7 @@ static int t2ev_data_reg(uint32_t opcode, uint32_t address,
                                (int) (opcode >> 0) & 0xf);
 
        } else if (opcode & (1 << 7)) {
-               switch ((opcode >> 24) & 0xf) {
+               switch ((opcode >> 20) & 0xf) {
                case 0:
                case 1:
                case 4:
@@ -3219,7 +3226,7 @@ static int t2ev_data_reg(uint32_t opcode, uint32_t address,
                                        (opcode & (1 << 24)) ? 'U' : 'S',
                                        (opcode & (1 << 26)) ? 'B' : 'H',
                                        (int) (opcode >> 8) & 0xf,
-                                       (int) (opcode >> 16) & 0xf,
+                                       (int) (opcode >> 0) & 0xf,
                                        suffix);
                        break;
                case 8:
@@ -3228,7 +3235,7 @@ static int t2ev_data_reg(uint32_t opcode, uint32_t address,
                case 0xb:
                        if (opcode & (1 << 6))
                                return ERROR_INVALID_ARGUMENTS;
-                       if (~opcode & (0xff << 12))
+                       if (((opcode >> 12) & 0xf) != 0xf)
                                return ERROR_INVALID_ARGUMENTS;
                        if (!(opcode & (1 << 20)))
                                return ERROR_INVALID_ARGUMENTS;
@@ -3276,7 +3283,7 @@ static int t2ev_load_word(uint32_t opcode, uint32_t address,
 
        if (rn == 0xf) {
                immed = opcode & 0x0fff;
-               if (opcode & (1 << 23))
+               if ((opcode & (1 << 23)) == 0)
                        immed = -immed;
                sprintf(cp, "LDR\tr%d, %#8.8" PRIx32,
                                (int) (opcode >> 12) & 0xf,
@@ -3314,7 +3321,7 @@ static int t2ev_load_word(uint32_t opcode, uint32_t address,
        if (((opcode >> 8) & 0xf) == 0xc || (opcode & 0x0900) == 0x0900) {
                char *p1 = "]", *p2 = "";
 
-               if (!(opcode & 0x0600))
+               if (!(opcode & 0x0500))
                        return ERROR_INVALID_ARGUMENTS;
 
                immed = opcode & 0x00ff;
@@ -3340,6 +3347,244 @@ static int t2ev_load_word(uint32_t opcode, uint32_t address,
        return ERROR_INVALID_ARGUMENTS;
 }
 
+static int t2ev_load_byte_hints(uint32_t opcode, uint32_t address,
+               arm_instruction_t *instruction, char *cp)
+{
+       int rn = (opcode >> 16) & 0xf;
+       int rt = (opcode >> 12) & 0xf;
+       int op2 = (opcode >> 6) & 0x3f;
+       unsigned immed;
+       char *p1 = "]", *p2 = "";
+       char *mnemonic;
+
+       switch ((opcode >> 23) & 0x3) {
+       case 0:
+               if ((rn & rt) == 0xf) {
+preload_immediate_t2:
+                       immed = opcode & 0xfff;
+preload_immediate_t1:
+                       p1 = (opcode & (1 << 21)) ? "W" : "";
+                       sprintf(cp, "PLD%s\t[r%d, #%d]\t; %#6.6x",
+                                       p1, rn, immed, immed);
+                       return ERROR_OK;
+               }
+               if (rn == 0x0f && rt != 0x0f) {
+ldrb_literal:
+                       immed = opcode & 0xfff;
+                       address = thumb_alignpc4(address);
+                       if (opcode & (1 << 23))
+                               address += immed;
+                       else
+                               address -= immed;
+                       sprintf(cp, "LDRB\tr%d, %#8.8" PRIx32,
+                                       rt, address);
+                       return ERROR_OK;
+               }
+               if (rn == 0x0f)
+                       break;
+               if ((op2 & 0x3c) == 0x38) {
+                       immed = opcode & 0xff;
+                       sprintf(cp, "LDRBT\tr%d, [r%d, #%d]\t; %#2.2x",
+                                       rt, rn, immed, immed);
+                       return ERROR_OK;
+               }
+               if ((op2 & 0x3c) == 0x30) {
+                       if (rt == 0x0f) {
+                               immed = opcode & 0xff;
+                               goto preload_immediate_t1;
+                       }
+                       mnemonic = "LDRB";
+ldrxb_immediate_t3:
+                       immed = opcode & 0xff;
+                       if (opcode & 0x200)
+                               immed = -immed;
+
+                       /* two indexed modes will write back rn */
+                       if (opcode & 0x100) {
+                               if (opcode & 0x400)     /* pre-indexed */
+                                       p2 = "]!";
+                               else {                  /* post-indexed */
+                                       p1 = "]";
+                                       p2 = "";
+                               }
+                       }
+ldrxb_immediate_t2:
+                       sprintf(cp, "%s\tr%d, [r%d%s, #%d%s\t; %#8.8x",
+                                       mnemonic, rt, rn, p1,
+                                       immed, p2, immed);
+                       return ERROR_OK;
+               }
+               if ((op2 & 0x24) == 0x24) {
+                       mnemonic = "LDRB";
+                       goto ldrxb_immediate_t3;
+               }
+               if (op2 == 0) {
+                       int rm = opcode & 0xf;
+
+                       if (rt == 0x0f)
+                               sprintf(cp, "PLD\t");
+                       else
+                               sprintf(cp, "LDRB.W\tr%d, ", rt);
+                       immed = (opcode >> 4) & 0x3;
+                       cp = strchr(cp, 0);
+                       sprintf(cp, "[r%d, r%d, LSL #%d]", rn, rm, immed);
+                       return ERROR_OK;
+               }
+               break;
+       case 1:
+               if (rt == 0xf)
+                       goto preload_immediate_t2;
+               if (rn == 0x0f)
+                       goto ldrb_literal;
+               mnemonic = "LDRB.W";
+               immed = opcode & 0xfff;
+               goto ldrxb_immediate_t2;
+       case 2:
+               if ((rn & rt) == 0xf) {
+pli_immediate:
+                       immed = opcode & 0xfff;
+                       address = thumb_alignpc4(address);
+                       if (opcode & (1 << 23))
+                               address += immed;
+                       else
+                               address -= immed;
+                       sprintf(cp, "PLI\t%#8.8" PRIx32, address);
+                       return ERROR_OK;
+               }
+               if (rn == 0xf && rt != 0xf) {
+ldrsb_literal:
+                       immed = opcode & 0xfff;
+                       address = thumb_alignpc4(address);
+                       if (opcode & (1 << 23))
+                               address += immed;
+                       else
+                               address -= immed;
+                       sprintf(cp, "LDRSB\t%#8.8" PRIx32, address);
+                       return ERROR_OK;
+               }
+               if (rn == 0xf)
+                       break;
+               if ((op2 & 0x3c) == 0x38) {
+                       immed = opcode & 0xff;
+                       sprintf(cp, "LDRSBT\tr%d, [r%d, #%d]\t; %2.2x",
+                                       rt, rn, immed, immed);
+                       return ERROR_OK;
+               }
+               if ((op2 & 0x3c) == 0x30) {
+                       if (rt == 0xf) {
+                               immed = opcode & 0xff;
+                               immed = -immed; // pli
+                               sprintf(cp, "PLI\t[r%d, #-%d]\t; %2.2x",
+                                               rn, immed, immed);
+                               return ERROR_OK;
+                       }
+                       mnemonic = "LDRSB";
+                       goto ldrxb_immediate_t3;
+               }
+               if ((op2 & 0x24) == 0x24) {
+                       mnemonic = "LDRSB";
+                       goto ldrxb_immediate_t3;
+               }
+               if (op2 == 0) {
+                       int rm = opcode & 0xf;
+
+                       if (rt == 0x0f)
+                               sprintf(cp, "PLI\t");
+                       else
+                               sprintf(cp, "LDRSB.W\tr%d, ", rt);
+                       immed = (opcode >> 4) & 0x3;
+                       cp = strchr(cp, 0);
+                       sprintf(cp, "[r%d, r%d, LSL #%d]", rn, rm, immed);
+                       return ERROR_OK;
+               }
+               break;
+       case 3:
+               if (rt == 0xf)
+                       goto pli_immediate;
+               if (rn == 0xf)
+                       goto ldrsb_literal;
+               immed = opcode & 0xfff;
+               mnemonic = "LDRSB";
+               goto ldrxb_immediate_t2;
+       }
+
+       return ERROR_INVALID_ARGUMENTS;
+}
+
+static int t2ev_load_halfword(uint32_t opcode, uint32_t address,
+               arm_instruction_t *instruction, char *cp)
+{
+       int rn = (opcode >> 16) & 0xf;
+       int rt = (opcode >> 12) & 0xf;
+       int op2 = (opcode >> 6) & 0x3f;
+       char *sign = (opcode & (1 < 24)) ? "S" : "";
+       unsigned immed;
+
+       if (rt == 0xf) {
+               sprintf(cp, "HINT (UNALLOCATED)");
+               return ERROR_OK;
+       }
+
+       if ((opcode & (1 << 23)) == 0) {
+               if (rn == 0xf) {
+ldrh_literal:
+                       immed = opcode & 0xfff;
+                       address = thumb_alignpc4(address);
+                       if (opcode & (1 << 23))
+                               address += immed;
+                       else
+                               address -= immed;
+                       sprintf(cp, "LDR%sH\tr%d, %#8.8" PRIx32,
+                                       sign, rt, address);
+                       return ERROR_OK;
+               }
+               if (op2 == 0) {
+                       int rm = opcode & 0xf;
+
+                       immed = (opcode >> 4) & 0x3;
+                       sprintf(cp, "LDR%sH.W\tr%d, [r%d, r%d, LSL #%d]",
+                                       sign, rt, rn, rm, immed);
+                       return ERROR_OK;
+               }
+               if ((op2 & 0x3c) == 0x38) {
+                       immed = (opcode >> 4) & 0x3;
+                       sprintf(cp, "LDR%sHT\tr%d, [r%d, #%d]\t; %#2.2x",
+                                       sign, rt, rn, immed, immed);
+                       return ERROR_OK;
+               }
+               if ((op2 & 0x3c) == 0x30 || (op2 & 0x24) == 0x24) {
+                       char *p1 = "]", *p2 = "";
+
+                       immed = opcode & 0xff;
+                       if (opcode & 0x200)
+                               immed = -immed;
+
+                       /* two indexed modes will write back rn */
+                       if (opcode & 0x100) {
+                               if (opcode & 0x400)     /* pre-indexed */
+                                       p2 = "]!";
+                               else {                  /* post-indexed */
+                                       p1 = "]";
+                                       p2 = "";
+                               }
+                       }
+                       sprintf(cp, "LDR%sH\tr%d, [r%d%s, #%d%s\t; %#8.8x",
+                                       sign, rt, rn, p1, immed, p2, immed);
+                       return ERROR_OK;
+               }
+       } else {
+               if (rn == 0xf)
+                       goto ldrh_literal;
+
+               immed = opcode & 0xfff;
+               sprintf(cp, "LDR%sH.W\tr%d, [r%d, #%d]\t; %#6.6x",
+                               sign, rt, rn, immed, immed);
+               return ERROR_OK;
+       }
+
+       return ERROR_INVALID_ARGUMENTS;
+}
+
 /*
  * REVISIT for Thumb2 instructions, instruction->type and friends aren't
  * always set.  That means eventual arm_simulate_step() support for Thumb2
@@ -3407,6 +3652,14 @@ int thumb2_opcode(target_t *target, uint32_t address, arm_instruction_t *instruc
        else if ((opcode & 0x1f700000) == 0x18500000)
                retval = t2ev_load_word(opcode, address, instruction, cp);
 
+       /* ARMv7-M: A5.3.8 Load halfword, unallocated memory hints */
+       else if ((opcode & 0x1e700000) == 0x18e00000)
+               retval = t2ev_load_halfword(opcode, address, instruction, cp);
+
+       /* ARMv7-M: A5.3.9 Load byte, memory hints */
+       else if ((opcode & 0x1e700000) == 0x18100000)
+               retval = t2ev_load_byte_hints(opcode, address, instruction, cp);
+
        /* ARMv7-M: A5.3.10 Store single data item */
        else if ((opcode & 0x1f100000) == 0x18000000)
                retval = t2ev_store_single(opcode, address, instruction, cp);
@@ -3415,7 +3668,9 @@ int thumb2_opcode(target_t *target, uint32_t address, arm_instruction_t *instruc
        else if ((opcode & 0x1e000000) == 0x0a000000)
                retval = t2ev_data_shift(opcode, address, instruction, cp);
 
-       /* ARMv7-M: A5.3.12 Data processing (register) */
+       /* ARMv7-M: A5.3.12 Data processing (register)
+        * and      A5.3.13 Miscellaneous operations
+        */
        else if ((opcode & 0x1f000000) == 0x1a000000)
                retval = t2ev_data_reg(opcode, address, instruction, cp);
 
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